Hi,
I'm trying to understand how HT is modeled into PCI space so that I can propose the "right" way to handle it in the dts. Depending on whether I run lspci -t under coreboot or factory BIOS, different topologies will be displayed. That means looking at lspci is not going to tell me how the hardware really works.
Given a standard setup with three HT links from the CPU, where do I find which device? Is PCI device 18.0 sort of a PCI bridge which has multiple PCI buses (HT links) behind itself?
+--18.0----(first HT link)--+--0.0 | |\ --0.1 | | | | | --(second HT link)---(may be empty) | | | ----(third HT link)--+--0.0 | +--1.0 | --1.1 +--18.1 +--18.2 +--18.3
Will a MP setup look like this: +--18.0----(first HT link)--+--19.0---(2nd HT link) | |\ | --(3rd HT link) | | | +--19.1 | | | +--19.2 | | | +--19.3 | | | | | --(second HT link)---(may be empty) | | | ----(third HT link)--+--0.0 | +--1.0 | --1.1 +--18.1 +--18.2 +--18.3
Or is the hardware organized in a completely different way? I'm especially curious about the MP scenario as depicted above. Where do the PCI functions of 18.[0123] reside?
Regards, Carl-Daniel