My stripped-bare Linux OS doesn't have the /dev/nvram node - presumably it needs to be enabled when building the kernel?
It's not a problem though, I've put together a little program for reading/writing the NVRAM area using the information from lxbios as a basis.
One more thing though. I noticed that the flashrom code for the Pm49fl004/2 chip uses a jedec chip erase sequence for doing erase. Unfortunately, the data sheet says that this operation is only supported in "A/A Mux mode". For FWH mode (which my IEI Nano-LX board seems to use) and LPC mode, this operation isn't supported and you must use a block erase instead. Do you think it's worth changing the code to perform the entire chip erase via a sequence of block erases instead - in order to give better compatibility?
Many thanks for all the help.
Alan
Alan Alexander mailto:alan@icerasemi.com Software Toolchain Engineering Icera Inc, 2520 The Quadrant, Aztec west, Bristol BS32 4AQ, UK Tel. +44 (0)1454 284805 -----Original Message----- From: Richard Smith [mailto:smithbone@gmail.com] Sent: 27 November 2007 20:51 To: Uwe Hermann Cc: Darmawan Salihun; Alan Alexander; linuxbios Subject: Re: [LinuxBIOS] flashrom support for AMD CS5536
Uwe Hermann wrote:
On Wed, Nov 28, 2007 at 01:15:01AM +0700, Darmawan Salihun wrote:
I'm not sure if there is somekind of /dev/cmos in Linux. But IIRC, there is a project that working on such a thing. I just don't know where exactly it is.
/dev/nvram
dd if=/dev/nvram of=nvram.img bs=1 count=114
That rips a copy of the CS5536 nvram. /dev/nvram skips the actual clock
registers. So the byte indexes don't exactly line up with the indexes you would use via port 0x70/0x71 IO. Something to note when lining it up with the docs.
Edit with a hex editor and flip the of= if= args to write.