* add a generic preop-opcode-pair table.
* rename ich_check_opcodes to ich_init_opcodes.
* let ich_init_opcodes do not need to access flashchip structure:
. move the definition of struct preop_opcode_pair to a better place . remove preop_opcode_pairs from 'struct flashchip' . modify ich_init_opcodes and generate_opcodes so that they do not access the flashchip structure
* call ich_init_opcodes during chipset enable. Now OPCODES generation mechanism works.
* fix a coding style mistake.
Signed-off-by: FENG yu ning fengyuning1984@gmail.com
Index: flashrom/flash.h =================================================================== --- flashrom/flash.h (revision 3809) +++ flashrom/flash.h (working copy) @@ -51,12 +51,6 @@
#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
-/* for pairing opcodes with their required preop */ -struct preop_opcode_pair { - uint8_t preop; - uint8_t opcode; -}; - struct flashchip { const char *vendor; const char *name; @@ -82,8 +76,6 @@ int (*write) (struct flashchip *flash, uint8_t *buf); int (*read) (struct flashchip *flash, uint8_t *buf);
- struct preop_opcode_pair *preop_opcode_pairs; - /* Some flash devices have an additional register space. */ volatile uint8_t *virtual_memory; volatile uint8_t *virtual_registers; @@ -537,6 +529,7 @@ int write_en29f002a(struct flashchip *flash, uint8_t *buf);
/* ichspi.c */ +int ich_init_opcodes(); int ich_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); int ich_spi_read(struct flashchip *flash, uint8_t * buf); Index: flashrom/chipset_enable.c =================================================================== --- flashrom/chipset_enable.c (revision 3809) +++ flashrom/chipset_enable.c (working copy) @@ -339,6 +339,7 @@ printf("WARNING: SPI Configuration Lockdown activated.\n"); ichspi_lock = 1; } + ich_init_opcodes(); break; case BUS_TYPE_ICH9_SPI: tmp2 = *(uint16_t *) (spibar + 0); Index: flashrom/ichspi.c =================================================================== --- flashrom/ichspi.c (revision 3809) +++ flashrom/ichspi.c (working copy) @@ -152,9 +152,8 @@ /* Common SPI functions */ static inline int find_opcode(OPCODES *op, uint8_t opcode); static inline int find_preop(OPCODES *op, uint8_t preop); -static int generate_opcodes(struct flashchip * flash, OPCODES * op); +static int generate_opcodes(OPCODES * op); static int program_opcodes(OPCODES * op); -int ich_check_opcodes(struct flashchip * flash); static int run_opcode(OPCODE op, uint32_t offset, uint8_t datalength, uint8_t * data); static int ich_spi_read_page(struct flashchip *flash, uint8_t * buf, @@ -162,6 +161,23 @@ static int ich_spi_write_page(struct flashchip *flash, uint8_t * bytes, int offset, int maxdata);
+/* for pairing opcodes with their required preop */ +struct preop_opcode_pair { + uint8_t preop; + uint8_t opcode; +}; + +struct preop_opcode_pair pops[] = { + {JEDEC_WREN, JEDEC_BYTE_PROGRAM}, + {JEDEC_WREN, JEDEC_SE}, /* sector erase */ + {JEDEC_WREN, JEDEC_BE_52}, /* block erase */ + {JEDEC_WREN, JEDEC_BE_D8}, /* block erase */ + {JEDEC_WREN, JEDEC_CE_60}, /* chip erase */ + {JEDEC_WREN, JEDEC_CE_C7}, /* chip erase */ + {JEDEC_EWSR, JEDEC_WRSR}, + {0,} +}; + OPCODES O_ST_M25P = { { JEDEC_WREN, @@ -204,12 +220,11 @@ return -1; }
-static int generate_opcodes(struct flashchip * flash, OPCODES * op) +static int generate_opcodes(OPCODES * op) { - int a, b, i; + int a, b, i; uint16_t preop, optype; uint32_t opmenu[2]; - struct preop_opcode_pair *pair;
if (op == NULL) { printf_debug("\n%s: null OPCODES pointer!\n", __FUNCTION__); @@ -257,14 +272,11 @@ for (a = 4; a < 8; a++) op->opcode[a].atomic = 0;
- pair = flash->preop_opcode_pairs; - if (pair) { - for (i = 0; pair[i].opcode; i++) { - a = find_opcode(op, pair[i].opcode); - b = find_preop(op, pair[i].preop); - if ((a != -1) && (b != -1)) - op->opcode[a].atomic = (uint8_t) ++b; - } + for (i = 0; pops[i].opcode; i++) { + a = find_opcode(op, pops[i].opcode); + b = find_preop(op, pops[i].preop); + if ((a != -1) && (b != -1)) + op->opcode[a].atomic = (uint8_t) ++b; }
return 0; @@ -323,13 +335,12 @@ return 0; }
-/* This function generates OPCODES from or programs OPCODES to the chipset - * according to its SPI configuration lock. +/* This function generates OPCODES from or programs OPCODES to ICH according to + * the chipset's SPI configuration lock. * - * It should be called in the ICH7/ICH9/VIA part of each operation driver(i.e. - * probe, read, erase, write, etc.) before any command is sent. + * It should be called before ICH sends any spi command. */ -int ich_check_opcodes(struct flashchip * flash) +int ich_init_opcodes() { int rc = 0; OPCODES *curopcodes_done; @@ -340,7 +351,7 @@ if (ichspi_lock) { printf_debug("Generating OPCODES... "); curopcodes_done = &O_EXISTING; - rc = generate_opcodes(flash, curopcodes_done); + rc = generate_opcodes(curopcodes_done); } else { printf_debug("Programming OPCODES... "); curopcodes_done = &O_ST_M25P; @@ -747,14 +758,6 @@ uint8_t *data; int count;
- /* program opcodes if not already done */ - if (curopcodes == NULL) { - printf_debug("Programming OPCODES... "); - curopcodes = &O_ST_M25P; - program_opcodes(curopcodes); - printf_debug("done\n"); - } - /* find cmd in opcodes-table */ for (a = 0; a < 8; a++) { if ((curopcodes->opcode[a]).opcode == cmd) {