Author: uwe Date: Sat Oct 2 22:51:29 2010 New Revision: 5908 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5908
Log: Add comments to make it clear why these two lines are written like that:
movl $REAL_XIP_ROM_BASE, %eax orl $MTRR_TYPE_WRBACK, %eax
Signed-off-by: Uwe Hermann uwe@hermann-uwe.de Acked-by: Uwe Hermann uwe@hermann-uwe.de
Modified: trunk/src/cpu/amd/car/cache_as_ram.inc trunk/src/cpu/intel/car/cache_as_ram.inc trunk/src/cpu/intel/model_106cx/cache_as_ram.inc trunk/src/cpu/intel/model_6ex/cache_as_ram.inc trunk/src/cpu/intel/model_6fx/cache_as_ram.inc trunk/src/cpu/via/car/cache_as_ram.inc
Modified: trunk/src/cpu/amd/car/cache_as_ram.inc ============================================================================== --- trunk/src/cpu/amd/car/cache_as_ram.inc Sat Oct 2 22:36:26 2010 (r5907) +++ trunk/src/cpu/amd/car/cache_as_ram.inc Sat Oct 2 22:51:29 2010 (r5908) @@ -269,6 +269,11 @@ */ movl $MTRRphysBase_MSR(1), %ecx xorl %edx, %edx + /* + * IMPORTANT: The two lines below can _not_ be written like this: + * movl $(REAL_XIP_ROM_BASE | MTRR_TYPE_WRBACK), %eax + * http://www.coreboot.org/pipermail/coreboot/2010-October/060855.html + */ movl $REAL_XIP_ROM_BASE, %eax orl $MTRR_TYPE_WRBACK, %eax wrmsr
Modified: trunk/src/cpu/intel/car/cache_as_ram.inc ============================================================================== --- trunk/src/cpu/intel/car/cache_as_ram.inc Sat Oct 2 22:36:26 2010 (r5907) +++ trunk/src/cpu/intel/car/cache_as_ram.inc Sat Oct 2 22:51:29 2010 (r5908) @@ -221,6 +221,11 @@ */ movl $MTRRphysBase_MSR(1), %ecx xorl %edx, %edx + /* + * IMPORTANT: The two lines below can _not_ be written like this: + * movl $(REAL_XIP_ROM_BASE | MTRR_TYPE_WRBACK), %eax + * http://www.coreboot.org/pipermail/coreboot/2010-October/060855.html + */ movl $REAL_XIP_ROM_BASE, %eax orl $MTRR_TYPE_WRBACK, %eax wrmsr
Modified: trunk/src/cpu/intel/model_106cx/cache_as_ram.inc ============================================================================== --- trunk/src/cpu/intel/model_106cx/cache_as_ram.inc Sat Oct 2 22:36:26 2010 (r5907) +++ trunk/src/cpu/intel/model_106cx/cache_as_ram.inc Sat Oct 2 22:51:29 2010 (r5908) @@ -97,6 +97,11 @@ #else #define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE #endif + /* + * IMPORTANT: The two lines below can _not_ be written like this: + * movl $(REAL_XIP_ROM_BASE | MTRR_TYPE_WRBACK), %eax + * http://www.coreboot.org/pipermail/coreboot/2010-October/060855.html + */ movl $REAL_XIP_ROM_BASE, %eax orl $MTRR_TYPE_WRBACK, %eax wrmsr
Modified: trunk/src/cpu/intel/model_6ex/cache_as_ram.inc ============================================================================== --- trunk/src/cpu/intel/model_6ex/cache_as_ram.inc Sat Oct 2 22:36:26 2010 (r5907) +++ trunk/src/cpu/intel/model_6ex/cache_as_ram.inc Sat Oct 2 22:51:29 2010 (r5908) @@ -97,6 +97,11 @@ #else #define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE #endif + /* + * IMPORTANT: The two lines below can _not_ be written like this: + * movl $(REAL_XIP_ROM_BASE | MTRR_TYPE_WRBACK), %eax + * http://www.coreboot.org/pipermail/coreboot/2010-October/060855.html + */ movl $REAL_XIP_ROM_BASE, %eax orl $MTRR_TYPE_WRBACK, %eax wrmsr
Modified: trunk/src/cpu/intel/model_6fx/cache_as_ram.inc ============================================================================== --- trunk/src/cpu/intel/model_6fx/cache_as_ram.inc Sat Oct 2 22:36:26 2010 (r5907) +++ trunk/src/cpu/intel/model_6fx/cache_as_ram.inc Sat Oct 2 22:51:29 2010 (r5908) @@ -104,6 +104,11 @@ #else #define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE #endif + /* + * IMPORTANT: The two lines below can _not_ be written like this: + * movl $(REAL_XIP_ROM_BASE | MTRR_TYPE_WRBACK), %eax + * http://www.coreboot.org/pipermail/coreboot/2010-October/060855.html + */ movl $REAL_XIP_ROM_BASE, %eax orl $MTRR_TYPE_WRBACK, %eax wrmsr
Modified: trunk/src/cpu/via/car/cache_as_ram.inc ============================================================================== --- trunk/src/cpu/via/car/cache_as_ram.inc Sat Oct 2 22:36:26 2010 (r5907) +++ trunk/src/cpu/via/car/cache_as_ram.inc Sat Oct 2 22:51:29 2010 (r5908) @@ -97,6 +97,11 @@ */ movl $MTRRphysBase_MSR(1), %ecx xorl %edx, %edx + /* + * IMPORTANT: The two lines below can _not_ be written like this: + * movl $(REAL_XIP_ROM_BASE | MTRR_TYPE_WRBACK), %eax + * http://www.coreboot.org/pipermail/coreboot/2010-October/060855.html + */ movl $REAL_XIP_ROM_BASE, %eax orl $MTRR_TYPE_WRBACK, %eax wrmsr