[coreboot] New patch to review for coreboot: 3db2146 AMD CIMx SB800: late.c: Use variable from for loop condition

[Paul Menzel]

Paul Menzel ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2562

-gerrit

commit 3db21469c45a6356d94bc09b1c40e2a50cb7d7bc
Author: Paul Menzel 
Date:   Fri Mar 1 13:05:04 2013 +0100

AMD CIMx SB800: late.c: Use variable from for loop condition

Introduced in

commit 8fed77ae4c46122859d0718678e54546e126d4bc
        Author: Scott Duplichan 
        Date:   Sat Jun 18 10:46:45 2011 -0500

ASRock E350M1: Configure SB800 GPP ports to support onboard pcie nic

Reviewed-on: http://review.coreboot.org/44

but no change in functionality is expected.

Change-Id: Iaa2fa13305dbe924965d27680cd02fe30c2f58a5
    Signed-off-by: Paul Menzel 
---
 src/southbridge/amd/cimx/sb800/late.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/southbridge/amd/cimx/sb800/late.c b/src/southbridge/amd/cimx/sb800/late.c
index cfdf9f2..506e90c 100644
--- a/src/southbridge/amd/cimx/sb800/late.c
+++ b/src/southbridge/amd/cimx/sb800/late.c
@@ -451,7 +451,7 @@ static void sb800_enable(device_t dev)
    	{
    		device_t device;
    		for (device = dev; device; device = device->next) {
-				if (dev->path.type != DEVICE_PATH_PCI) continue;
+				if (device->path.type != DEVICE_PATH_PCI) continue;
    			if ((device->path.pci.devfn & ~7) != PCI_DEVFN(0x15,0)) break;
    			sb_config->PORTCONFIG[device->path.pci.devfn & 3].PortCfg.PortPresent = device->enabled;
    		}