Author: stepan Date: Fri Apr 9 15:31:07 2010 New Revision: 5392 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5392
Log: drop unused files drop some non-car code from amd/dualcore (there is no AMD dualcore without CAR)
Signed-off-by: Stefan Reinauer stepan@coresystems.de Acked-by: Stefan Reinauer stepan@coresystems.de
Deleted: trunk/src/cpu/amd/car/cache_as_ram.lds trunk/src/cpu/x86/32bit/reset32.inc trunk/src/cpu/x86/32bit/reset32.lds Modified: trunk/src/cpu/amd/car/post_cache_as_ram.c trunk/src/cpu/amd/dualcore/dualcore.c trunk/src/cpu/x86/16bit/entry16.lds trunk/src/cpu/x86/car/cache_as_ram.lds
Modified: trunk/src/cpu/amd/car/post_cache_as_ram.c ============================================================================== --- trunk/src/cpu/amd/car/post_cache_as_ram.c Fri Apr 9 13:55:43 2010 (r5391) +++ trunk/src/cpu/amd/car/post_cache_as_ram.c Fri Apr 9 15:31:07 2010 (r5392) @@ -1,6 +1,7 @@ /* 2005.6 by yhlu * 2006.3 yhlu add copy data from CAR to ram */ +#include <arch/stages.h> #include "cpu/amd/car/disable_cache_as_ram.c"
static inline void print_debug_pcar(const char *strval, uint32_t val)
Modified: trunk/src/cpu/amd/dualcore/dualcore.c ============================================================================== --- trunk/src/cpu/amd/dualcore/dualcore.c Fri Apr 9 13:55:43 2010 (r5391) +++ trunk/src/cpu/amd/dualcore/dualcore.c Fri Apr 9 15:31:07 2010 (r5392) @@ -70,95 +70,5 @@ }
} -#if CONFIG_USE_DCACHE_RAM == 0 -static void do_k8_init_and_stop_secondaries(void) -{ - struct node_core_id id; - device_t dev; - unsigned apicid; - unsigned max_siblings; - msr_t msr; - - /* Skip this if there was a built in self test failure */
- if (is_cpu_pre_e0()) { - id.nodeid = lapicid() & 0x7; - id.coreid = 0; - } else { - /* Which cpu are we on? */ - id = get_node_core_id_x();
- /* Set NB_CFG_MSR - * Linux expect the core to be in the least signficant bits. - */ - msr = rdmsr(NB_CFG_MSR); - msr.hi |= (1<<(54-32)); // InitApicIdCpuIdLo - wrmsr(NB_CFG_MSR, msr); - } - - /* For now assume all cpus have the same number of siblings */ - max_siblings = (cpuid_ecx(0x80000008) & 0xff) + 1; - - /* Enable extended apic ids */ - device_t dev_f0 = PCI_DEV(0, 0x18+id.nodeid, 0); - unsigned val = pci_read_config32(dev_f0, 0x68); - val |= (1 << 18) | (1 << 17); - pci_write_config32(dev_f0, 0x68, val); - - /* Set the lapicid */ - #if (CONFIG_ENABLE_APIC_EXT_ID == 1) - unsigned initial_apicid = get_initial_apicid(); - #if CONFIG_LIFT_BSP_APIC_ID == 0 - if( initial_apicid != 0 ) // other than bsp - #endif - { - /* use initial apic id to lift it */ - uint32_t dword = lapic_read(LAPIC_ID); - dword &= ~(0xff<<24); - dword |= (((initial_apicid + CONFIG_APIC_ID_OFFSET) & 0xff)<<24); - - lapic_write(LAPIC_ID, dword); - } - - #if CONFIG_LIFT_BSP_APIC_ID == 1 - bsp_apicid += CONFIG_APIC_ID_OFFSET; - #endif - - #endif - - - /* Remember the cpuid */ - if (id.coreid == 0) { - dev = PCI_DEV(0, 0x18 + id.nodeid, 2); - pci_write_config32(dev, 0x9c, cpuid_eax(1)); - } - - /* Maybe call distinguish_cpu_resets only on the last core? */ - distinguish_cpu_resets(id.nodeid); - if (!boot_cpu()) { - stop_this_cpu(); - } -} - -static void k8_init_and_stop_secondaries(void) -{ - /* This doesn't work with Cache As Ram because it messes with - the MTRR state, which breaks the init detection. - do_k8_init_and_stop_secondaries should be usable by CAR code. - */ - - int init_detected; - - init_detected = early_mtrr_init_detected(); - amd_early_mtrr_init(); - - enable_lapic(); - init_timer(); - if (init_detected) { - asm volatile ("jmp __cpu_reset"); - } - - do_k8_init_and_stop_secondaries(); -} - -#endif
Modified: trunk/src/cpu/x86/16bit/entry16.lds ============================================================================== --- trunk/src/cpu/x86/16bit/entry16.lds Fri Apr 9 13:55:43 2010 (r5391) +++ trunk/src/cpu/x86/16bit/entry16.lds Fri Apr 9 15:31:07 2010 (r5392) @@ -1,2 +1 @@ gdtptr16_offset = gdtptr16 & 0xffff; - _start_offset = _start & 0xffff;
Modified: trunk/src/cpu/x86/car/cache_as_ram.lds ============================================================================== --- trunk/src/cpu/x86/car/cache_as_ram.lds Fri Apr 9 13:55:43 2010 (r5391) +++ trunk/src/cpu/x86/car/cache_as_ram.lds Fri Apr 9 15:31:07 2010 (r5392) @@ -1,3 +1,23 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2004 Stefan Reinauer + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + SECTIONS { .init . : { _init = .; @@ -7,5 +27,4 @@ . = ALIGN(16); _einit = .; } - }