On Tue, 8 Oct 2002, Hieu T. Tran wrote:
We're working to port LinuxBIOS to a via 133 platform with a 512KB boot flash. We believe that the flash is wired such that on reset, 0xFFFF0 is mapped to 0x7FFF0 on the flash, which is slightly below 512KB on the flash.
I am missing the problem. That's what should happen, right? So that physical ffff0 maps to 7fff0 on the flash, and the 8086 reset vector is visible to the processor at 0xf000:fff0, and the correct instructions are fetched.
I don't think there is a problem here.
ron