On 11/16/2013 07:15 PM, Peter Stuge wrote:
Quite likely this requires monitoring LPC communication with the H8 EC to compare (timing of) what the factory BIOS with what coreboot does, so if you're interested you need to have or be able to create some means of monitoring LPC IO. That could be an expensive logic analyzer or it could be free time, programmable logic, an FX2 chip and sigrok.
Sounds tempting, but I will have to decline due to lack of hardware and time. If anyone wants to monitor LPC, be prepared to be able to sample 6 lines at 100MHz or more. I'm not sure the FX2 has enough bandwidth for this. Sigrok has an LPC decoder, but it does not yet work reliably. LPC is fairly simple otherwise
Alex