Author: yhlu Date: 2006-10-05 01:09:09 +0200 (Thu, 05 Oct 2006) New Revision: 2441
Added: trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_cheetah/dx/amd8131_2.asl trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_cheetah/dx/amd8132_2.asl trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_cheetah/dx/pci3.asl trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_cheetah/dx/pci3_hc.asl trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_cheetah/dx/pci4.asl trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_cheetah/dx/pci4_hc.asl trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_leopard/dx/pci0_hc.asl Log: add missed asl for ht chain
Added: trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_cheetah/dx/amd8131_2.asl =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_cheetah/dx/amd8131_2.asl (rev 0) +++ trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_cheetah/dx/amd8131_2.asl 2006-10-04 23:09:09 UTC (rev 2441) @@ -0,0 +1,114 @@ +/* + * Copyright 2005 AMD + */ + + Device (PG0A) + { + /* 8132 pcix bridge*/ + Method (_ADR, 0, NotSerialized) + { + Return (DADD(GHCD(HCIN, 0), 0x00000000)) + } + + Method (_PRW, 0, NotSerialized) + { + If (CondRefOf (_S3, Local0)) { Return (Package (0x02) { 0x29, 0x03 }) } + Else { Return (Package (0x02) { 0x29, 0x01 }) } + } + + Name (APIC, Package (0x04) + { + // Slot A - PIRQ BCDA + Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x0018 }, //Slot 2 + Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0019 }, + Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x001A }, + Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x001B }, + + }) + Name (PICM, Package (0x04) + { + Package (0x04) { 0x0000FFFF, 0x00, _SB.PCI0.LNKA, 0x00 },//Slot 2 + Package (0x04) { 0x0000FFFF, 0x01, _SB.PCI0.LNKB, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x02, _SB.PCI0.LNKC, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x03, _SB.PCI0.LNKD, 0x00 }, + }) + + Name (DNCG, Ones) + + Method (_PRT, 0, NotSerialized) + { + If (LEqual (^DNCG, Ones)) { + Multiply (HCIN, 0x0008, Local2) // GSI for 8132 is 4 so we get 8 + Store (0x00, Local1) + While (LLess (Local1, 0x04)) + { + // Update the GSI according to HCIN + Store(DeRefOf(Index (DeRefOf (Index (APIC, Local1)), 3)), Local0) + Add(Local2, Local0, Local0) + Store(Local0, Index (DeRefOf (Index (APIC, Local1)), 3)) + Increment (Local1) + } + + Store (0x00, ^DNCG) + + } + + If (LNot (PICF)) { Return (PICM) } + Else { Return (APIC) } + } + } + + Device (PG0B) + { + /* 8132 pcix bridge 2 */ + Method (_ADR, 0, NotSerialized) + { + Return (DADD(GHCD(HCIN, 0), 0x00010000)) + } + + Method (_PRW, 0, NotSerialized) + { + If (CondRefOf (_S3, Local0)) { Return (Package (0x02) { 0x22, 0x03 }) } + Else { Return (Package (0x02) { 0x22, 0x01 }) } + } + + Name (APIC, Package (0x04) + { + // Slot A - PIRQ ABCD + Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x001F },// Slot 1 + Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0020 }, + Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x0021 }, + Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x0022 } + }) + Name (PICM, Package (0x04) + { + Package (0x04) { 0x0000FFFF, 0x00, _SB.PCI0.LNKA, 0x00 },//Slot 1 + Package (0x04) { 0x0000FFFF, 0x01, _SB.PCI0.LNKB, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x02, _SB.PCI0.LNKC, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x03, _SB.PCI0.LNKD, 0x00 } + }) + + Name (DNCG, Ones) + + Method (_PRT, 0, NotSerialized) + { + If (LEqual (^DNCG, Ones)) { + Multiply (HCIN, 0x0008, Local2) // GSI for 8132 is 4 so we get 8 + Store (0x00, Local1) + While (LLess (Local1, 0x04)) + { + // Update the GSI according to HCIN + Store(DeRefOf(Index (DeRefOf (Index (APIC, Local1)), 3)), Local0) + Add(Local2, Local0, Local0) + Store(Local0, Index (DeRefOf (Index (APIC, Local1)), 3)) + Increment (Local1) + } + + Store (0x00, ^DNCG) + + } + + If (LNot (PICF)) { Return (PICM) } + Else { Return (APIC) } + } + }
Added: trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_cheetah/dx/amd8132_2.asl =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_cheetah/dx/amd8132_2.asl (rev 0) +++ trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_cheetah/dx/amd8132_2.asl 2006-10-04 23:09:09 UTC (rev 2441) @@ -0,0 +1,114 @@ +/* + * Copyright 2005 AMD + */ + + Device (PG0A) + { + /* 8132 pcix bridge*/ + Method (_ADR, 0, NotSerialized) + { + Return (DADD(GHCD(HCIN, 0), 0x00000000)) + } + + Method (_PRW, 0, NotSerialized) + { + If (CondRefOf (_S3, Local0)) { Return (Package (0x02) { 0x29, 0x03 }) } + Else { Return (Package (0x02) { 0x29, 0x01 }) } + } + + Name (APIC, Package (0x04) + { + // Slot A - PIRQ BCDA + Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x0018 }, //Slot 2 + Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0019 }, + Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x001A }, + Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x001B }, + + }) + Name (PICM, Package (0x04) + { + Package (0x04) { 0x0000FFFF, 0x00, _SB.PCI0.LNKA, 0x00 },//Slot 2 + Package (0x04) { 0x0000FFFF, 0x01, _SB.PCI0.LNKB, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x02, _SB.PCI0.LNKC, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x03, _SB.PCI0.LNKD, 0x00 }, + }) + + Name (DNCG, Ones) + + Method (_PRT, 0, NotSerialized) + { + If (LEqual (^DNCG, Ones)) { + Multiply (HCIN, 0x000e, Local2) // GSI for 8132 is 7 so we get 14 + Store (0x00, Local1) + While (LLess (Local1, 0x04)) + { + // Update the GSI according to HCIN + Store(DeRefOf(Index (DeRefOf (Index (APIC, Local1)), 3)), Local0) + Add(Local2, Local0, Local0) + Store(Local0, Index (DeRefOf (Index (APIC, Local1)), 3)) + Increment (Local1) + } + + Store (0x00, ^DNCG) + + } + + If (LNot (PICF)) { Return (PICM) } + Else { Return (APIC) } + } + } + + Device (PG0B) + { + /* 8132 pcix bridge 2 */ + Method (_ADR, 0, NotSerialized) + { + Return (DADD(GHCD(HCIN, 0), 0x00010000)) + } + + Method (_PRW, 0, NotSerialized) + { + If (CondRefOf (_S3, Local0)) { Return (Package (0x02) { 0x22, 0x03 }) } + Else { Return (Package (0x02) { 0x22, 0x01 }) } + } + + Name (APIC, Package (0x04) + { + // Slot A - PIRQ ABCD + Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x001F },// Slot 1 + Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0020 }, + Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x0021 }, + Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x0022 } + }) + Name (PICM, Package (0x04) + { + Package (0x04) { 0x0000FFFF, 0x00, _SB.PCI0.LNKA, 0x00 },//Slot 1 + Package (0x04) { 0x0000FFFF, 0x01, _SB.PCI0.LNKB, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x02, _SB.PCI0.LNKC, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x03, _SB.PCI0.LNKD, 0x00 } + }) + + Name (DNCG, Ones) + + Method (_PRT, 0, NotSerialized) + { + If (LEqual (^DNCG, Ones)) { + Multiply (HCIN, 0x000e, Local2) // GSI for 8132 is 7 so we get 14 + Store (0x00, Local1) + While (LLess (Local1, 0x04)) + { + // Update the GSI according to HCIN + Store(DeRefOf(Index (DeRefOf (Index (APIC, Local1)), 3)), Local0) + Add(Local2, Local0, Local0) + Store(Local0, Index (DeRefOf (Index (APIC, Local1)), 3)) + Increment (Local1) + } + + Store (0x00, ^DNCG) + + } + + If (LNot (PICF)) { Return (PICM) } + Else { Return (APIC) } + } + }
Added: trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_cheetah/dx/pci3.asl =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_cheetah/dx/pci3.asl (rev 0) +++ trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_cheetah/dx/pci3.asl 2006-10-04 23:09:09 UTC (rev 2441) @@ -0,0 +1,68 @@ +/* + * Copyright 2005 AMD + */ +DefinitionBlock ("SSDT3.aml", "SSDT", 1, "AMD-K8", "AMDACPI", 100925440) +{ + Scope (_SB) + { + External (DADD, MethodObj) + External (GHCE, MethodObj) + External (GHCN, MethodObj) + External (GHCL, MethodObj) + External (GHCD, MethodObj) + External (GNUS, MethodObj) + External (GIOR, MethodObj) + External (GMEM, MethodObj) + External (GWBN, MethodObj) + External (GBUS, MethodObj) + + External (PICF) + + External (_SB.PCI0.LNKA, DeviceObj) + External (_SB.PCI0.LNKB, DeviceObj) + External (_SB.PCI0.LNKC, DeviceObj) + External (_SB.PCI0.LNKD, DeviceObj) + + Device (PCIX) + { + + // BUS ? Second HT Chain + Name (HCIN, 0xcc) // HC2 0x01 + + Name (_UID, 0xdd) // HC 0x03 + + Name (_HID, "PNP0A03") + + Method (_ADR, 0, NotSerialized) //Fake bus should be 0 + { + Return (DADD(GHCN(HCIN), 0x00000000)) + } + + Method (_BBN, 0, NotSerialized) + { + Return (GBUS (GHCN(HCIN), GHCL(HCIN))) + } + + Method (_STA, 0, NotSerialized) + { + Return (_SB.GHCE(HCIN)) + } + + Method (_CRS, 0, NotSerialized) + { + Name (BUF0, ResourceTemplate () { }) + Store( GHCN(HCIN), Local4) + Store( GHCL(HCIN), Local5) + + Concatenate (_SB.GIOR (Local4, Local5), BUF0, Local1) + Concatenate (_SB.GMEM (Local4, Local5), Local1, Local2) + Concatenate (_SB.GWBN (Local4, Local5), Local2, Local3) + Return (Local3) + } + + Include ("pci3_hc.asl") + } + } + +} +
Added: trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_cheetah/dx/pci3_hc.asl =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_cheetah/dx/pci3_hc.asl (rev 0) +++ trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_cheetah/dx/pci3_hc.asl 2006-10-04 23:09:09 UTC (rev 2441) @@ -0,0 +1 @@ + Include ("amd8151.asl")
Added: trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_cheetah/dx/pci4.asl =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_cheetah/dx/pci4.asl (rev 0) +++ trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_cheetah/dx/pci4.asl 2006-10-04 23:09:09 UTC (rev 2441) @@ -0,0 +1,68 @@ +/* + * Copyright 2005 AMD + */ +DefinitionBlock ("SSDT4.aml", "SSDT", 1, "AMD-K8", "AMDACPI", 100925440) +{ + Scope (_SB) + { + External (DADD, MethodObj) + External (GHCE, MethodObj) + External (GHCN, MethodObj) + External (GHCL, MethodObj) + External (GHCD, MethodObj) + External (GNUS, MethodObj) + External (GIOR, MethodObj) + External (GMEM, MethodObj) + External (GWBN, MethodObj) + External (GBUS, MethodObj) + + External (PICF) + + External (_SB.PCI0.LNKA, DeviceObj) + External (_SB.PCI0.LNKB, DeviceObj) + External (_SB.PCI0.LNKC, DeviceObj) + External (_SB.PCI0.LNKD, DeviceObj) + + Device (PCIX) + { + + // BUS ? Second HT Chain + Name (HCIN, 0xcc) // HC2 0x01 + + Name (_UID, 0xdd) // HC 0x03 + + Name (_HID, "PNP0A03") + + Method (_ADR, 0, NotSerialized) //Fake bus should be 0 + { + Return (DADD(GHCN(HCIN), 0x00000000)) + } + + Method (_BBN, 0, NotSerialized) + { + Return (GBUS (GHCN(HCIN), GHCL(HCIN))) + } + + Method (_STA, 0, NotSerialized) + { + Return (_SB.GHCE(HCIN)) + } + + Method (_CRS, 0, NotSerialized) + { + Name (BUF0, ResourceTemplate () { }) + Store( GHCN(HCIN), Local4) + Store( GHCL(HCIN), Local5) + + Concatenate (_SB.GIOR (Local4, Local5), BUF0, Local1) + Concatenate (_SB.GMEM (Local4, Local5), Local1, Local2) + Concatenate (_SB.GWBN (Local4, Local5), Local2, Local3) + Return (Local3) + } + + Include ("pci4_hc.asl") + } + } + +} +
Added: trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_cheetah/dx/pci4_hc.asl =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_cheetah/dx/pci4_hc.asl (rev 0) +++ trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_cheetah/dx/pci4_hc.asl 2006-10-04 23:09:09 UTC (rev 2441) @@ -0,0 +1 @@ + Include ("amd8131_2.asl")
Added: trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_leopard/dx/pci0_hc.asl =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_leopard/dx/pci0_hc.asl (rev 0) +++ trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_leopard/dx/pci0_hc.asl 2006-10-04 23:09:09 UTC (rev 2441) @@ -0,0 +1,2 @@ + Include ("amd8111.asl") //real SB at first + Include ("amd8131.asl")