Slightly related to the TCO timer issue, is that of shotgun approach vs localized resets. TCO timer is just a subset of the "bigiron" features vendors put on their boards. Is global reset an obstacle to using them?
I'm reminded of the Machine Check registers. Linux has a boot option, mce=bootlog, to enable reading these when linux starts, to get info regarding the last reboot, if caused by a machine check, since it's likely that the previous generation couldn't log (to disk) in the MCE handler.
Linux's mce= defaults to ignoring the register contents at startup, since many BIOS are reset-happy. I bet there's places in Coreboot that do this, like the hypertransport (but I don't know of registers that matter) for example.
There are other registers that survive localized (CPU only or other scopes) resets vs power on reset (global),
The Intel 845 datasheet mentions that this depends on the board being wired correctly. The common practice of OR-ing the power-on reset (power-good) signals with the front panel reset, defeats many of these features.
Power management has made fixing some of that a requirement, dividing a system up into many power wells and reset domains, but there's bound to be boards made that just don't care. (I hope mine isn't one of them)
I'm eyeing Cisco's feature that tells you the source of the last reset, power-on, vs firmware monitor cmd, vs others.
Does anyone's hareware flag a TCO reset so the next generation can tell that's why it was booted?