On 06.03.2008 21:42, ron minnich wrote:
This is all from work last night. I'd lke to get these in.
This is a cumulative set of fixes for LX800 boards. These are all tested on ALIX 1C and DBE62.
This includes:
- the working power button patch.
- onchipuart2 for very early startup -- this will be replaced with a better mechanism soon.
- dts mod for powerbutton on cs5536
- dbe62 dts fix for COM1 setup
- ram check call in dbe62 initram.c
- Carl-Daniel's fix to detect incorrect access to spd variables.
- more debug prints in geodelx northbridge support code.
This is cumulative since we're lagging on acks a bit and it's hard to keep this
stuff all seperated out since it involves a common set of files. I'd like to get
it acked and in tree today if possible. It's a very small set of lines changed so please
forgive me for the cumulative nature.
Thanks
Signed-off-by: Ronald G. Minnich rminnich@gmail.com
Acked-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
It would be cool if you could add the attached changes on top before
committing, though. They make cs5536_setup_onchipuart() handle both
UARTs and add missing break in dbe61 initram.
Regards,
Carl-Daniel
--
http://www.hailfinger.org/
diff -u southbridge/amd/cs5536/stage1.c southbridge/amd/cs5536/stage1.c
--- southbridge/amd/cs5536/stage1.c (working copy)
+++ southbridge/amd/cs5536/stage1.c (Arbeitskopie)
@@ -182,7 +182,7 @@
*
* See page 412 of the AMD Geode CS5536 Companion Device data book.
*/
-void cs5536_setup_onchipuart(void)
+void cs5536_setup_onchipuart1(void)
{
struct msr msr;
@@ -255,6 +255,17 @@
wrmsr(MDD_UART2_CONF, msr);
}
+void cs5536_setup_onchipuart(int uart)
+{
+ switch (uart) {
+ case 1:
+ cs5536_setup_onchipuart1();
+ break;
+ case 2:
+ cs5536_setup_onchipuart2();
+ break;
+ }
+}
/**
* Board setup.
diff -u southbridge/amd/cs5536/cs5536.h southbridge/amd/cs5536/cs5536.h
--- southbridge/amd/cs5536/cs5536.h (working copy)
+++ southbridge/amd/cs5536/cs5536.h (Arbeitskopie)
@@ -443,8 +443,7 @@
/* Function prototypes */
void cs5536_disable_internal_uart(void);
-void cs5536_setup_onchipuart(void);
-void cs5536_setup_onchipuart2(void);
+void cs5536_setup_onchipuart(int uart);
void cs5536_stage1(void);
#endif /* SOUTHBRIDGE_AMD_CS5536_CS5536_H */
diff -u mainboard/artecgroup/dbe61/initram.c mainboard/artecgroup/dbe61/initram.c
--- mainboard/artecgroup/dbe61/initram.c (working copy)
+++ mainboard/artecgroup/dbe61/initram.c (Arbeitskopie)
@@ -102,9 +102,9 @@
for (i = 0; i < ARRAY_SIZE(spd_table); i++) {
if (spd_table[i].address == address) {
ret = spd_table[i].data;
+ break;
}
}
-
if (i == ARRAY_SIZE(spd_table))
printk(BIOS_DEBUG, " addr %02x does not exist in SPD table",
address);
diff -u mainboard/artecgroup/dbe62/initram.c mainboard/artecgroup/dbe62/initram.c
--- mainboard/artecgroup/dbe62/initram.c (working copy)
+++ mainboard/artecgroup/dbe62/initram.c (Arbeitskopie)
@@ -95,7 +95,6 @@
break;
}
}
-
if (i == ARRAY_SIZE(spd_table))
printk(BIOS_DEBUG, " addr %02x does not exist in SPD table",
address);
diff -u mainboard/artecgroup/dbe62/stage1.c mainboard/artecgroup/dbe62/stage1.c
--- mainboard/artecgroup/dbe62/stage1.c (working copy)
+++ mainboard/artecgroup/dbe62/stage1.c (Arbeitskopie)
@@ -58,7 +58,7 @@
* NOTE: Must do this AFTER the early_setup! It is counting on some
* early MSR setup for the CS5536.
*/
- cs5536_setup_onchipuart2();
+ cs5536_setup_onchipuart(2);
}
void mainboard_pre_payload(void)
only in patch2:
unchanged:
--- mainboard/amd/norwich/stage1.c (Revision 631)
+++ mainboard/amd/norwich/stage1.c (Arbeitskopie)
@@ -42,7 +42,7 @@
* early MSR setup for the CS5536. We do this early for debug.
* Real setup should be done in chipset init via dts settings.
*/
- cs5536_setup_onchipuart();
+ cs5536_setup_onchipuart(1);
}
void mainboard_pre_payload(void)
only in patch2:
unchanged:
--- mainboard/artecgroup/dbe61/stage1.c (Revision 631)
+++ mainboard/artecgroup/dbe61/stage1.c (Arbeitskopie)
@@ -59,7 +59,7 @@
* NOTE: Must do this AFTER the early_setup! It is counting on some
* early MSR setup for the CS5536.
*/
- cs5536_setup_onchipuart();
+ cs5536_setup_onchipuart(1);
}
void mainboard_pre_payload(void)