On Thu, Jun 10, 2010 at 04:48:17PM -0400, Arne Georg Gleditsch wrote:
Joe Korty joe.korty@ccur.com writes:
Hi Arne, First first applied only the memset change then I applied the whole patch.
The memset-only change did indeed speed up the memset. It is now instantaeous. The speedup seems too great to me, it implies that I've no-oped memset somehow.
Well, RAMTOP is what, 16MB? DDR2 (peak) transfer rates are 100-500 times that per second. There's reason that memset operation should be taking any noticeable amount of time.
Then I applied the whole patch. I had to change the "#if CONFIG_ARCH_X86" to "#if 1" as CONFIG_ARCH_X86 doesn't seem to be set. With that single change to your patch I see a speed-up to 'no delays, anywhere'; but now the execution patch is quite a bit different, we are in a warm reset infinite loop.
That's interesting. What's happening at the end there, before the warm reset?
Hi Arnie, I've looked more closely; I first see a warm reset (which is normal) followed by an infinite series of soft resets (which are new). Here is the first part of the log, containing the warm reset and two of thesoft resets.
Still digesting this new development, myself.....
Regards, Joe
coreboot-4.0-r5628M Thu Jun 10 16:21:49 EDT 2010 starting...
Coreboot configured for H8DME-2 with K10 AMD processors BSP Family_Model: 00100f42 *sysinfo range: [000cc000,000cdfa0] bsp_apicid = 00 cpu_init_detectedx = 00000000 microcode: equivalent rev id = 0x1041, current patch id = 0x00000000 microcode: rev id (1062) does not match this patch. microcode: Not updated! Fix microcode_updates[] cpuSetAMDMSR done Enter amd_ht_init() AMD_CB_EventNotify() event class: 05 event: 1004 data: 04 00 00 01 AMD_CB_ManualBUIDSwapList() AMD_CB_EventNotify() event class: 05 event: 2006 data: 04 00 02 ff Exit amd_ht_init() cpuSetAMDPCI 00 done cpuSetAMDPCI 01 done Prep FID/VID Node:00 F3x80: e600a681 F3x84: a0e641e6 F3xD4: c3310f24 F3xD8: 03001615 F3xDC: 00005322 Prep FID/VID Node:01 F3x80: e600a681 F3x84: a0e641e6 F3xD4: c3310f24 F3xD8: 03001615 F3xDC: 00005322 setup_remote_node: 01 done Start node 01 done. core0 started: core0: --- { APICID = 04 NODEID = 01 COREID = 00} --- crm1i v ostcaordet:_ oteqhueri_vcaloernest( r)e c iniidt =n od0ex1:0 4001 , ccuorrersen:t 03p at hSt aird t= o t0hx0e0r0 c0o00r0e0 - 2nmiodceriocdo: d0e:0 r ceovr ieds : (01036 .)i ndoiets nnoodte :m 0a1t ch ctohriess :p a0t3c h S ptamirctr ooctohdeer: cNoorte u-p dnaotdeeid!d :F i0x1 m iccorroecso:d e0_3u a attccceaooorsrrr[etee]xexx :d:: -p--c-p- -a--u-S p i{{e{tc AiAAAMdPPPD:IIIM CCCSIIIDDDR === 000OOO32n eNNN DDDEEEiIIInDDDit _===f i000d000v iCCCdOOO_RRRaEEEpIII(DDDs t===a 0gc0e3211}}}) ------ap---
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: FFFkIeIIDDDdV)VVIII D=DD o1oonn0n 6 AAA0P0PP:: i 0W006a57 t
for AP stage 1: ap_apicid = 2 readback = 2010601 common_fid(packed) = 10600 Wait for AP stage 1: ap_apicid = 3 readback = 3010601 common_fid(packed) = 10600 Wait for AP stage 1: ap_apicid = 4 readback = 4010601 common_fid(packed) = 10600 Wait for AP stage 1: ap_apicid = 5 readback = 5010601 common_fid(packed) = 10600 Wait for AP stage 1: ap_apicid = 6 readback = 6010601 common_fid(packed) = 10600 Wait for AP stage 1: ap_apicid = 7 readback = 7010601 common_fid(packed) = 10600 common_fid = 10600 FID Change Node:00, F3xD4: c3310f26 FID Change Node:01, F3xD4: c3310f26 End FIDVIDMSR 0xc0010071 0x30b000a3 0x38035040 mcp55_num:01 ...WARM RESET...
coreboot-4.0-r5628M Thu Jun 10 16:21:49 EDT 2010 starting...
Coreboot configured for H8DME-2 with K10 AMD processors BSP Family_Model: 00100f42 *sysinfo range: [000cc000,000cdfa0] bsp_apicid = 00 cpu_init_detectedx = 00000000 microcode: equivalent rev id = 0x1041, current patch id = 0x00000000 microcode: rev id (1062) does not match this patch. microcode: Not updated! Fix microcode_updates[] cpuSetAMDMSR done Enter amd_ht_init() AMD_CB_EventNotify() event class: 05 event: 1004 data: 04 00 00 01 AMD_CB_ManualBUIDSwapList() AMD_CB_EventNotify() event class: 05 event: 2006 data: 04 00 02 ff Exit amd_ht_init() cpuSetAMDPCI 00 done cpuSetAMDPCI 01 done Prep FID/VID Node:00 F3x80: e600a681 F3x84: a0e641e6 F3xD4: c3310f26 F3xD8: 03001615 F3xDC: 00005322 Prep FID/VID Node:01 F3x80: e600a681 F3x84: a0e641e6 F3xD4: c3310f26 F3xD8: 03001615 F3xDC: 00005322 setup_remote_node: 01 done Start node 01 done. core0 started: 01 start_other_cores() init node: c0o0r ec0:o re s-:- -0 3{ A 3SICtIaDrt =o th0e4r N OcoDrEeI D -= n o0d1 eCiOd:R E0ID0 = c0o0re}s -:- -0
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iiinnniiittt___fffiiidddvvviiiddd___ssstttaaagggeee222 aaapppiiiccciiiddd::: 000567
fill_mem_ctrl() raminit_amdmct() raminit_amdmct begin: Node: 01 base: 00 limit: 7fffff BottomIO: e00000 Copy dram map from Node 0 to Node 01 raminit_amdmct end: v_esp=000cbee8 testx = 5a5a5a5a Copying data from cache to RAM -- switching to use RAM as stack... Done testx = 5a5a5a5a Disabling cache as ram now Clearing initial memory region: Done Loading stage image. Check CBFS header at fffff8da magic is 4f524243 Found CBFS header at fffff8da Check fallback/romstage CBFS: follow chain: fff00000 + 38 + 124d4 + align -> fff12540 Check fallback/coreboot_ram Stage: loading fallback/coreboot_ram @ 0x200000 (1179648 bytes), entry @ 0x200000
INIT detected from --- { APICID = 00 NODEID = 00 COREID = 00} ---
Issuing SOFT_RESET...
coreboot-4.0-r5628M Thu Jun 10 16:21:49 EDT 2010 starting...
Coreboot configured for H8DME-2 with K10 AMD processors BSP Family_Model: 00100f42 *sysinfo range: [000cc000,000cdfa0] bsp_apicid = 00 cpu_init_detectedx = 00000000 microcode: equivalent rev id = 0x1041, current patch id = 0x00000000 microcode: rev id (1062) does not match this patch. microcode: Not updated! Fix microcode_updates[] cpuSetAMDMSR done Enter amd_ht_init() AMD_CB_EventNotify() event class: 05 event: 1004 data: 04 00 00 01 AMD_CB_ManualBUIDSwapList() AMD_CB_EventNotify() event class: 05 event: 2006 data: 04 00 02 ff Exit amd_ht_init() cpuSetAMDPCI 00 done cpuSetAMDPCI 01 done Prep FID/VID Node:00 F3x80: e600a681 F3x84: a0e641e6 F3xD4: c3310f26 F3xD8: 03001615 F3xDC: 00005322 Prep FID/VID Node:01 F3x80: e600a681 F3x84: a0e641e6 F3xD4: c3310f26 F3xD8: 03001615 F3xDC: 00005322 setup_remote_node: 01 done Start node 01 done. core0 started: 01 start_other_cores() nit node: 0 0 c orceor0e: s: -0--3 { -SAtPIaCrtI Do =t her 0c4 oNreO D-EI Dno d= e0i1d: CO0R0 EI cDo =r es0:0} 0-3 i- nit mnicordoec:o 0d1e : ceqoureisv:a l0e3n t rSetva ritd o t=h e0rx 1c0o4r1e, -c unrordeenitd :p a0t1c h ciodr e=s :0 x0000 rre0 sc0tcoc00aoror etexexx:mid:: c ra op---c ---oa---dp {i{{e: c AiAArPdPPeI:IIvC CC IIIiDDDd ===( 1060001232) NNNdOOOoDDDeEEEsIII DDDn o===t 000m000a tC---OOOhRRR EEEtIIIhDDDi s=== p000a321}}}tc h----.-- m
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[]]]
cccpppuuuSSSeeetttAAAMMMDDDMMMSSSRRR dddooonnneee
iiinnniiittt___fffiiidddvvviiiddd___ssstttaaagggeee222 aaapppiiiccciiiddd::: 000576
fill_mem_ctrl() raminit_amdmct() raminit_amdmct begin: Node: 01 base: 00 limit: 7fffff BottomIO: e00000 Copy dram map from Node 0 to Node 01 raminit_amdmct end: v_esp=000cbee8 testx = 5a5a5a5a Copying data from cache to RAM -- switching to use RAM as stack... Done testx = 5a5a5a5a Disabling cache as ram now Clearing initial memory region:
INIT detected from --- { APICID = 00 NODEID = 00 COREID = 00} ---
Issuing SOFT_RESET...
coreboot-4.0-r5628M Thu Jun 10 16:21:49 EDT 2010 starting...
Coreboot configured for H8DME-2 with K10 AMD processors BSP Family_Model: 00100f42 *sysinfo range: [000cc000,000cdfa0] bsp_apicid = 00 cpu_init_detectedx = 00000000 microcode: equivalent rev id = 0x1041, current patch id = 0x00000000 microcode: rev id (1062) does not match this patch. microcode: Not updated! Fix microcode_updates[] cpuSetAMDMSR done Enter amd_ht_init() AMD_CB_EventNotify() event class: 05 event: 1004 data: 04 00 00 01 AMD_CB_ManualBUIDSwapList() AMD_CB_EventNotify() event class: 05 event: 2006 data: 04 00 02 ff Exit amd_ht_init() cpuSetAMDPCI 00 done cpuSetAMDPCI 01 done Prep FID/VID Node:00 F3x80: e600a681 F3x84: a0e641e6 F3xD4: c3310f26 F3xD8: 03001615 F3xDC: 00005322 Prep FID/VID Node:01 F3x80: e600a681 F3x84: a0e641e6 F3xD4: c3310f26 F3xD8: 03001615 F3xDC: 00005322 setup_remote_node: 01 done Start node 01 done. core0 started: 01 start_other_cores() nit node: 0 0c ocreo0re:s : - 0-3- { SAtPaICrIt Do =t her 0c4 oNreO DE-I nDo d= e0id1: C O00R EI Dco r=e 0s0: }0 -3- i rnit mnicordoec:o 0d1e : ceqourievsa:l e0n3t eSvt airdt o=t h0exr1 0c4o1r,e c-u rnroedneti dp:a t0c1h icdo r=e s0:x 00000 teee sc0tcc0aooo0rrrr exxx:d::mi ca rp-o-- ac---po--- di ec{{{: i AAdArPP:PeII IvCCC IIIiDDDd ===( 1060002132) NNNdOOOoDDDeEEEsIII DDDn o===t 000m000a tCCCcOOOhRRR EEEtIIIhDDDi s=== p000a213t}}} ch------.---
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cccpppuuuSSSeeetttAAAMMMDDDMMMSSSRRR dddooonnneee
iiinnniiittt___fffiiidddvvviiiddd___ssstttaaagggeee222 aaapppiiiccciiiddd::: 000765
fill_mem_ctrl() raminit_amdmct() raminit_amdmct begin: Node: 01 base: 00 limit: 7fffff BottomIO: e00000 Copy dram map from Node 0 to Node 01 raminit_amdmct end: v_esp=000cbee8 testx = 5a5a5a5a Copying data from cache to RAM -- switching to use RAM as stack... Done testx = 5a5a5a5a Disabling cache as ram now Clearing initial memory region:
INIT detected from --- { APICID = 00 NODEID = 00 COREID = 00} ---
Issuing SOFT_RESET...
coreboot-4.0-r5628M Thu Jun 10 16:21:49 EDT 2010 starting...
Coreboot configured for H8DME-2 with K10 AMD processors