Arrandale and QM57... very nice recent hardware.
You are going to need to 1) make TINY_BOOTBLOCK work, 2) make sure QM57 can map the entire ROM, 3) make CAR work on Arrandale, IIRC coreboot still has no support for anything in the Intel Core family of CPUs.
Good luck.
主题： Re: [coreboot] how to deal with large romstage size?
Hi all,
After I add some memory initialisize code, the romstage is over 64K byte,and tne code can't run properly. Then what should I do when romstage is over 64K byte? Is romstage's size limits to 64KB?
Thanks a lot! 2011-03-01
It is not a direct limitation on romstage's size, but a result of most chipsets mapping only the top 64KB of flash to the memory space. Most chipsets require some programming to have the entire flash rom appear in memory. Your code didn't run properly because not all of it has been mapped to memory space and get effectively cut.
But my romstage for Intel 440BX is only about 11KB. What chipset are you dealing with?
my chipset is intel arrandal+qm57,it's MRC code is very large(about 110KB after build) :-(
Also, look at implementing TINY_BOOTBLOCK which leaves a tiny stub, well within the 64KB limit, which does nothing but enable enough hardware (southbridge to be exact) to make the entire rom visible, then locates and executes the real romstage which is now just another stage in CBFS. Again, all 440BX/PIIX4 boards implement this and can be a reference.
actually, it can run at bootblock,but can not reach "cache_as_ram:". So I think the code failed at jmp to the romstage in CBFS.