Author: myles Date: 2008-12-19 03:43:46 +0100 (Fri, 19 Dec 2008) New Revision: 1080
Modified: coreboot-v3/Kconfig coreboot-v3/mainboard/amd/Kconfig coreboot-v3/mainboard/amd/serengeti/defconfig coreboot-v3/mainboard/amd/serengeti/dts coreboot-v3/southbridge/amd/amd8151/amd8151_agp3.c Log: This patch makes the 8151 compile and adds it to the amd serengeti board.
Signed-off-by: Myles Watson mylesgw@gmail.com Acked-by: Marc Jones marcj303@gmail.com
Modified: coreboot-v3/Kconfig =================================================================== --- coreboot-v3/Kconfig 2008-12-19 02:40:54 UTC (rev 1079) +++ coreboot-v3/Kconfig 2008-12-19 02:43:46 UTC (rev 1080) @@ -112,6 +112,8 @@ boolean config SOUTHBRIDGE_NVIDIA_MCP55 boolean +config SOUTHBRIDGE_AMD_AMD8151 + boolean config SOUTHBRIDGE_AMD_AMD8132 boolean config SOUTHBRIDGE_AMD_AMD8111
Modified: coreboot-v3/mainboard/amd/Kconfig =================================================================== --- coreboot-v3/mainboard/amd/Kconfig 2008-12-19 02:40:54 UTC (rev 1079) +++ coreboot-v3/mainboard/amd/Kconfig 2008-12-19 02:43:46 UTC (rev 1080) @@ -63,6 +63,7 @@ select NORTHBRIDGE_AMD_K8 select SOUTHBRIDGE_AMD_AMD8111 select SOUTHBRIDGE_AMD_AMD8132 + select SOUTHBRIDGE_AMD_AMD8151 select SUPERIO_WINBOND_W83627HF select IOAPIC help
Modified: coreboot-v3/mainboard/amd/serengeti/defconfig =================================================================== --- coreboot-v3/mainboard/amd/serengeti/defconfig 2008-12-19 02:40:54 UTC (rev 1079) +++ coreboot-v3/mainboard/amd/serengeti/defconfig 2008-12-19 02:43:46 UTC (rev 1080) @@ -113,6 +113,7 @@ CONFIG_NORTHBRIDGE_AMD_K8=y CONFIG_SOUTHBRIDGE_AMD_AMD8111=y CONFIG_SOUTHBRIDGE_AMD_AMD8132=y +CONFIG_SOUTHBRIDGE_AMD_AMD8151=y CONFIG_SUPERIO_WINBOND_W83627HF=y
#
Modified: coreboot-v3/mainboard/amd/serengeti/dts =================================================================== --- coreboot-v3/mainboard/amd/serengeti/dts 2008-12-19 02:40:54 UTC (rev 1079) +++ coreboot-v3/mainboard/amd/serengeti/dts 2008-12-19 02:43:46 UTC (rev 1080) @@ -26,11 +26,24 @@ subsystem_device = "0x2b80"; cpus { }; apic@0 { + /config/("northbridge/amd/k8/apic"); }; domain@0 { /config/("northbridge/amd/k8/domain"); - pci0@18,0 { + pci@18,0 { /config/("northbridge/amd/k8/pci"); + pci_a@0,0 { + /config/("southbridge/amd/amd8132/pcix.dts"); + }; + pci_a@0,1 { + /config/("southbridge/amd/amd8132/apic.dts"); + }; + pci_a@1,0 { + /config/("southbridge/amd/amd8132/pcix.dts"); + }; + pci_a@1,1 { + /config/("southbridge/amd/amd8132/apic.dts"); + }; pci@0,0 { /config/("southbridge/amd/amd8111/pci.dts"); pci@0,0{ @@ -41,15 +54,21 @@ }; pci@0,2{ /config/("southbridge/amd/amd8111/usb2.dts"); - disable; + disabled; }; pci@1,0{ /config/("southbridge/amd/amd8111/nic.dts"); - disable; + disabled; }; }; pci@1,0 { /config/("southbridge/amd/amd8111/lpc.dts"); + ioport@2e { + /config/("superio/winbond/w83627hf/dts"); + kbenable = "1"; + com1enable = "1"; + hwmenable = "1"; + }; }; pci@1,1 { /config/("southbridge/amd/amd8111/ide.dts"); @@ -64,28 +83,34 @@ }; pci@1,5 { /config/("southbridge/amd/amd8111/ac97audio.dts"); + disabled; }; pci@1,6 { /config/("southbridge/amd/amd8111/ac97modem.dts"); + disabled; }; - pci@2,0 { - /config/("southbridge/amd/amd8132/pcix.dts"); + pci@1,7 { }; }; - pci1@18,0 { - /config/("northbridge/amd/k8/pci"); + pci@18,1 {}; + pci@18,2 {}; + pci@18,3 { + /config/("northbridge/amd/k8/mcf3"); }; - pci2@18,0 { + pci@19,0 { /config/("northbridge/amd/k8/pci"); }; - pci@18,1 {}; - pci@18,2 {}; - pci@18,3 {}; + pci@19,1 { + pci@0,0 { + /config/("southbridge/amd/amd8151/agpbridge.dts"); + }; + pci@1,0 { + /config/("southbridge/amd/amd8151/agpdev.dts"); + }; + }; + pci@19,2 {}; + pci@19,3 { + /config/("northbridge/amd/k8/mcf3"); + }; }; - ioport@2e { - /config/("superio/winbond/w83627hf/dts"); - kbenable = "1"; - com1enable = "1"; - hwmenable = "1"; - }; };
Modified: coreboot-v3/southbridge/amd/amd8151/amd8151_agp3.c =================================================================== --- coreboot-v3/southbridge/amd/amd8151/amd8151_agp3.c 2008-12-19 02:40:54 UTC (rev 1079) +++ coreboot-v3/southbridge/amd/amd8151/amd8151_agp3.c 2008-12-19 02:43:46 UTC (rev 1080) @@ -25,7 +25,6 @@ #include <device/pci_ids.h> #include <statictree.h> #include <config.h> -#include "mcp55.h"
static void agp3bridge_init(struct device * dev) { @@ -45,7 +44,7 @@ {.pci = {.vendor = PCI_VENDOR_ID_AMD, .device = PCI_DEVICE_ID_AMD_8151_AGP}}}, .constructor = default_device_constructor, - .phase3_scan = pci_scan_bridge + .phase3_scan = pci_scan_bridge, .phase4_read_resources = pci_bus_read_resources, .phase4_set_resources = pci_set_resources, .phase5_enable_resources = pci_bus_enable_resources, @@ -80,7 +79,7 @@ {.pci = {.vendor = PCI_VENDOR_ID_AMD, .device = PCI_DEVICE_ID_AMD_8151_SYSCTRL}}}, .constructor = default_device_constructor, - .phase4_enable_disable = agp3dev_enable, + .phase3_enable = agp3dev_enable, .phase4_read_resources = pci_dev_read_resources, .phase4_set_resources = pci_set_resources, .phase5_enable_resources = pci_dev_enable_resources,