Board label: A1 | A2 | B1 | B2 <-- physical
i2c address: 51 | 53 | 50 | 52
OK then we need to modify it on WIKI page and also produce a patch to fix it..
I also tried to swap DIMM0, DIMM2 with DIMM1, DIMM3
and the results from
i2cdetect were funny:
looks like hanged I2C bus.
I'm not sure right now if it did.. the table is
probably correct but now
even non-ECC is not fully detected. Assuming it IS correct, is there
anything I can try except making myself familiar with RAM init and
searching for a bug, which could take a while, like, forever?
No, if you get this far, don't underestimate yourself. I remember back in those
days memory init looked looked like a huge magic, but nowadays with DDR2/DDR3 it
is MAGIC. Last 5 years added a lot of complexity to the raminit, which allows me
to say that K8 DDR is sufficiently simple. Not easy but doable.
I think you need to see message from spd_enable_2channels()
printk(BIOS_SPEW, "Enabling dual channel memory\n");
(you need to set debug level to SPEW)
If you dont see thise message the function above failed for some reason and only
one channel is used. Try to look into this function first.
Thank you for your help Rudolf!
No problem, I'm glad that my work is still used.