2009/1/30 Peter Stuge peter@stuge.se:
Peter Stuge wrote:
Can someone please review these register definitions? Thank you!
Attaching latest version also available at http://stuge.se/mt.cs5536_pic_divil3.patch
const struct msrdef cs5536_msrs[] = { + /* 0x51400008-0x5140000f per 33238G pages 356-361 */ + /* 0x51400015 per 33238G pages 365-366 */ + /* 0x51400020-0x51400027 per 33238G pages 379-385 */ + { 0x51400008, MSRTYPE_RDWR, MSR2(0, 0), "DIVIL_LBAR_IRQ", "Local BAR - IRQ Mapper", { + { 63, 15, RESERVED }, + { 48, 1, RESERVED },
I'm sure there is some reason, but why isn't this just "{ 63, 16, RESERVED }," ?
+ { 47, 4, "IO_MASK", "I/O Address Mask Value", PRESENT_BIN, {
The masks are probably most readable as hex, especially to match the display type of the BAR.
+ { 0x51400009, MSRTYPE_RDWR, MSR2(0, 0), "DIVIL_LBAR_KEL", "Local BAR - KEL from USB OHC Host Controller", {
Copied directly from the spec, but just "Local BAR - KEL from USB OHC" wouldn't propagate RAS Syndrome.
+ { 0x51400020, MSRTYPE_RDWR, MSR2(0, 0), "PIC_YSEL_LOW", "IRQ Mapper Unrestricted Y Select Low", { + { 63, 32, RESERVED }, + { 31, 4, "MAP_Y7", "Map Unrestricted Y Input 7", PRESENT_BIN, {
HEX is maybe more readable for all of these selects?
+ { 0, 1, "IG8_STS_PRIM", "Primary Input 8", PRESENT_BIN, { + { MSR1(0), "No interrupt." }, + { MSR1(1), "Interrupt status." },
Like Myles said, "Interrupt set" or maybe "Interrupt requested" for value '1'