See patch. The pnp_dev_info[] was incomplete and partly wrong, due to me doing blind copy-paste. After checking with the datasheet I _think_ the contents are correct now, but it would be nice if someone could double-check that.
Various other superios have the same problem I'm afraid, I'll post more patches later...
For parallel port there are _two_ base addresses (0x60/0x61 and 0x62/0x63), but most other superios/boards only use the first one (I assume the second set is only needed for some non-standard parallel port modes?)
Also, I left IT8712F_GPIO "empty" like this
{&ops, IT8712F_GPIO, },
even though it does have 0x60/0x61, 0x62/0x63, and 0x64/0x65 base address registers, but those are "SMI# Normal Run Access Base Address" and "Simple I/O Base Address" and "Panel Button De-bounce Base Address", which I guess we don't need (?)
Uwe.