Re: [coreboot] DL145G3

[Peter Stuge]

FENG Yu Ning wrote:
> SST49LF080A has a #TBL pin deciding whether writes to the top boot
> block is protected.

Correct. It is most likely the cause. But - it would also be
interesting if you could measure the voltage Samuel, on pin 8
after having run flashrom in any mode.
> if someone has access to the BCM5875(HT1000) datasheet, (s)he may
> check whether there are registers that control the output to the
> #TBL pin, then improves flashrom.

Unfortunately (or fortunately, because that Broadcom data book is
probably difficult to find) TBL# (and often WP# too) is usually
connected to a GPIO on some chip. (And that chip may be easier to
find docs for.) But - this Broadcom chipset could have dedicated pin,
I'm not ruling it out.

//Peter