Hello Ron,
I have here significant problem to understand you. It is not a first time, but I would sign/stick this misunderstanding to my ignorance. :-(
As my best understanding is, INTEL FSP is nothing else, but stripped to the bones BIOS, with ONLY PEI phase in the charge (NOT the entire PEI, Platform init is selectively implemented in FSP). We have there CPU init, PCH init, and, at the very end. Platform init.
Now, said that, I will ask the entire community the following questions: [1] What is the definition of Coreboot (in my naive vision, minimal/a must DXE + OS Boot Loader phase preparation - example: SeaBIOS payload)? [2] What does it mean in your interpretation: "single DXE"? [3] If you are talking about MinnowMax. I assume you are talking about ATOM BYT M/I skus, aren't you? [4] Why, in the first place, INTEL FSP experts are NOT answering your quest, since they (I guess) better understand what you are asking for??? [5] What does it mean: "our own Tiano Core"? Does INTEL does NOT own Tiano Core? Or Coreboot (Google) created its own Tiano Core???
At least, you've heard from me. ;-)
Thank you, Zoran _______
On 4/15/17, ron minnich rminnich@gmail.com wrote:
Hi, I'm starting to look at the minnowmax firmware images. I have a rather odd requirement. I'd like to scrape the image down to just PEI, nothing more, and then have that PEI load a single DXE, which will then take over.
We've had success with this on a few other EFI sytsems, but the minnowmax seems to be slightly special. We've done a small amount of work to rearrange the firmware volume and quickly learned that you can't relocate anything in the firmware volume ... they appear to have built it with hardwired pointers to things like nvram variables (why bother with a flash file system if you're going to do things like that ... oh well) ... so it looks like at minimum we need to build/burn our own tiano core to start.
Anyway, if you have looked at the minnowmax, I'd like to hear from you.
Thanks!
ron