Hi, i'll have a generic ram detection routine ready by the end of the week that it able to detect any size of EDO/FPM (and maybe SDRAM too) just by reading/writing data. it doesn't need to access any smbus. i'll use this routine to support DRAM initialization on almost any socket 7 chipset..just have a little patience. the routine will not be able to determine any memory latencies by itself, so it may require user interactity or it will just set default values. the chipsets that will be supported: ALi Aladdin III/IV/IV/V AMD 640 Intel 430FX/HX/VX/TX SiS 5501,5502,5503/5120/5571/5581,5582/5591,5592/5597,5598/530 VIA 570M/580VP(VP1)/580VPX(VPX)/595(VP2)/597(VP3)/598(MVP3) before you ask: yes, i'll write a separate raminit.c for all those chipsets..so it may take a while. anyway, the all use the same ram detection routine that, as said before, will be finished by the end of the week. any help is appreciated. if the ram detection works for sdram as well (i didn't took a closer look but i guess it works just like the edo/fpm detection) i'll write routines for various Slot1 chipsets, too. Intel LX/BX first i guess. btw. if you happen to live in germany and you want to donate some of the above listed hardware for testing purpose: drop me a line :) Holger