[coreboot] Re: Memory Down approach Error on intel Denverton board

[Ganesh Kumar C]

Hi MariuszX,

Thanks for you time .

Yes . I have added the below  memoryDownConfig struct in

src/mainboard/intel/harcuvar/romstage.c file .

const MEMORY_DOWN_CONFIG mMemoryDownConfig = {
        .SlotState = {
                {STATE_MEMORY_DOWN, STATE_MEMORY_SLOT},
                {STATE_MEMORY_SLOT, STATE_MEMORY_SLOT}
        },
        .SpdDataLen = MAX_SPD_BYTES, //512
        .SpdDataPtr = {
                {(void *)CONFIG_SPD_LOC, (void *)NULL},
                {(void *)NULL, (void *)NULL}
        }
};

Regards

Ganeshc

________________________________
From: Szafranski, MariuszX 
Sent: Thursday, January 20, 2022 6:55 PM
To: Ganesh Kumar C; Coreboot
Subject: RE: Memory Down approach Error on intel Denverton board

Hi,

Did you adjusted mMemoryDownConfig structure in mainboard`s romstage.c file to much your memory down configuration?
Refer to commented out example just above structure definition.
Also double check if .SpdDataPtr structure member for memory down slot has correct pointer to spd.bin content.

Mariusz

--------------------------------------------------------------
Intel Research and Development Ireland Limited
Registered in Ireland
Registered Office: Collinstown Industrial Park, Leixlip, County Kildare
Registered Number: 308263

This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). Any review or distribution by others is strictly prohibited. If you are not the intended recipient, please contact the sender and delete all copies.

CAUTION: This email originated from outside your organization. Do not click links or open attachments unless you recognize the sender and know the content is safe.