Author: mjones Date: 2009-09-14 19:00:04 +0200 (Mon, 14 Sep 2009) New Revision: 4633
Modified: trunk/coreboot-v2/src/northbridge/amd/amdmct/mct/mct_d.c Log: Use the coreboot pci config read/write functions instead of direct cf8/cfc access. The fam10 pci functions will use mmio and do not have SMP pci access issues.
Signed-off-by: Marc Jones marcj303@gmail.com Acked-by: Patrick Georgi patrick.georgi@coresystems.de
Modified: trunk/coreboot-v2/src/northbridge/amd/amdmct/mct/mct_d.c =================================================================== --- trunk/coreboot-v2/src/northbridge/amd/amdmct/mct/mct_d.c 2009-09-14 14:15:43 UTC (rev 4632) +++ trunk/coreboot-v2/src/northbridge/amd/amdmct/mct/mct_d.c 2009-09-14 17:00:04 UTC (rev 4633) @@ -2472,22 +2472,13 @@
u32 Get_NB32(u32 dev, u32 reg) { - u32 addr; - - addr = (dev>>4) | (reg & 0xFF) | ((reg & 0xf00)<<16); - outl((1<<31) | (addr & ~3), 0xcf8); - - return inl(0xcfc); + return pci_read_config32(dev, reg); }
void Set_NB32(u32 dev, u32 reg, u32 val) { - u32 addr; - - addr = (dev>>4) | (reg & 0xFF) | ((reg & 0xf00)<<16); - outl((1<<31) | (addr & ~3), 0xcf8); - outl(val, 0xcfc); + pci_write_config32(dev, reg, val); }