On Fri, 2010-06-04 at 22:08 +0200, coreboot information wrote:
Dear coreboot readers!
This is the automatic build system of coreboot.
The developer "myles" checked in revision 5609 to the coreboot repository. This caused the following changes:
Change Log: Fixes for Nokia IP530 and associated drivers.
Signed-off-by: Marc Bertens mbertens@xs4all.nl Signed-off-by: Myles Watson mylesgw@gmail.com Acked-by: Marc Bertens mbertens@xs4all.nl
Build Log: Compilation of nokia:ip530 has been broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5609&device=ip530&v...
The warning are due renaming those variables, when it got into SVN .
mbertens@andrala:~/src/coreboot$ make menuconfig .config:197:warning: trying to assign nonexistent symbol PCI1225 .config:198:warning: trying to assign nonexistent symbol PCI1420 .config:199:warning: trying to assign nonexistent symbol PCI1520 .config:200:warning: trying to assign nonexistent symbol DRIVERS_DEC21143PD # # configuration written to .config #
*** End of coreboot configuration. *** Execute 'make' to build or try 'make help'.
mbertens@andrala:~/src/coreboot$ make clean mbertens@andrala:~/src/coreboot$ make GEN build.h ROMCC romstage.inc GEN crt0.S CC mainboard/nokia/ip530/crt0.s CC mainboard/nokia/ip530/crt0.initobj.o CC lib/uart8250.initobj.o CC lib/memset.initobj.o CC lib/memcpy.initobj.o CC lib/memcmp.initobj.o CC lib/cbfs.initobj.o CC lib/lzma.initobj.o CC console/vtxprintf.initobj.o CC arch/i386/lib/printk_init.initobj.o CC arch/i386/lib/cbfs_and_run.initobj.o LINK coreboot OBJCOPY coreboot.bootblock CC arch/i386/lib/c_start.o CC console/uart8250_console.driver.o CC console/vga_console.driver.o CC drivers/ti/pcmcia-cardbus/ti-pcmcia-cardbus.driver.o CC drivers/dec/21143/21143pd.driver.o CC southbridge/intel/i82371eb/i82371eb.driver.o CC southbridge/intel/i82371eb/i82371eb_isa.driver.o CC southbridge/intel/i82371eb/i82371eb_ide.driver.o CC southbridge/intel/i82371eb/i82371eb_usb.driver.o CC southbridge/intel/i82371eb/i82371eb_smbus.driver.o CC southbridge/intel/i82371eb/i82371eb_reset.driver.o CC northbridge/intel/i440bx/northbridge.driver.o CC cpu/intel/model_6xx/model_6xx_init.driver.o SCONFIG mainboard/nokia/ip530/devicetree.cb CC mainboard/nokia/ip530/static.o CC mainboard/nokia/ip530/mainboard.o CC mainboard/nokia/ip530/irq_tables.o CC lib/clog2.o CC lib/uart8250.o CC lib/memset.o CC lib/memcpy.o CC lib/memcmp.o CC lib/memmove.o CC lib/malloc.o CC lib/delay.o CC lib/fallback_boot.o CC lib/compute_ip_checksum.o CC lib/version.o CC lib/cbfs.o CC lib/lzma.o CC lib/gcc.o CC lib/cbmem.o CC boot/hardwaremain.o CC boot/selfboot.o CC console/printk.o CC console/console.o CC console/vtxprintf.o CC console/vsprintf.o CC devices/device.o CC devices/root_device.o CC devices/device_util.o CC devices/pci_device.o CC devices/pcix_device.o CC devices/pciexp_device.o CC devices/agp_device.o CC devices/cardbus_device.o CC devices/pnp_device.o CC devices/pci_ops.o CC devices/smbus_ops.o CC devices/pci_rom.o CC pc80/mc146818rtc.o CC pc80/isa-dma.o CC pc80/i8259.o CC pc80/keyboard.o CC arch/i386/boot/boot.o CC arch/i386/boot/coreboot_table.o CC arch/i386/boot/multiboot.o CC arch/i386/boot/gdt.o CC arch/i386/boot/tables.o CC arch/i386/boot/pirq_routing.o CC arch/i386/lib/cpu.o CC arch/i386/lib/pci_ops_conf1.o CC arch/i386/lib/pci_ops_conf2.o CC arch/i386/lib/pci_ops_mmconf.o CC arch/i386/lib/pci_ops_auto.o CC arch/i386/lib/exception.o CC arch/i386/lib/ioapic.o CC devices/oprom/x86.o CC devices/oprom/x86_asm.o CC devices/oprom/x86_interrupts.o CC pc80/vga/vga_io.o CC cpu/intel/socket_PGA370/socket_PGA370.o CC superio/smsc/smscsuperio/superio.o CC cpu/x86/tsc/delay_tsc.o CC cpu/x86/mtrr/mtrr.o CC cpu/x86/lapic/lapic.o CC cpu/x86/lapic/lapic_cpu_init.o CC cpu/x86/lapic/secondary.o CC cpu/x86/cache/cache.o CC cpu/intel/microcode/microcode.o AR coreboot.a CC coreboot_ram.o CC coreboot_ram CBFS coreboot.rom PAYLOAD ../seabios/out/bios.bin.elf (compression: LZMA) CBFSPRINT coreboot.rom
coreboot.rom: 512 kB, bootblocksize 65536, romsize 524288, offset 0x0 Alignment: 64 bytes
Name Offset Type Size fallback/coreboot_ram 0x0 stage 40192 fallback/payload 0x9d40 payload 41248 (empty) 0x13ec0 null 377080 mbertens@andrala:~/src/coreboot$
Nothing broke here it just compiles fine, and the code runs on the Nokia.
If something broke during this checkin please be a pain in myles's neck until the issue is fixed.
If this issue is not fixed within 24h the revision should be backed out.
Best regards, coreboot automatic build system