Stefan Reinauer firstname.lastname@example.org writes:
I've been wondering before... why this odd approach with read8x and gs:... instead of just doing normal read8/16/32 ?
Primarily to enable mapping in 64-bit space, I suppose. I guess we could map AMD fam10 mmio config space into 32 bit-space as well, the main reason not to is that it consumes quite a lot of space.
Where's %gs set up for romcc_io usage?
src/cpu/amd/model_10xxx/init_cpus.c, set_pci_mmio_conf_reg. I added explicit per-invocation assignment for post-car since the base is lost whenever %gs is changed. (Which happened once on transition to post-car and which I assume can happen arbitrarily when we're executing option roms).