Hi Ward,
... I think this helps. Have a look at how I modified init_cpus.c:
http://ward.vandewege.net/coreboot/h8dmr/fam10/init_cpus-ak.c
Is that what you intended? Here's a boot log
http://ward.vandewege.net/coreboot/h8dmr/fam10/h8dmr-ak.cap
As you can see, it gets past the second CPU initialization, which is great. However, it soft resets itself a little further - but that's after (at least) two cores start to talk at the same time, so perhaps that's a different problem? Or maybe I didn't implement that call to AMD_checkLinkInitialized correctly?
Yes, this is exactly the behaviour it is supposed to show. Also, you put the function call in the right place. An observation we made with our C2 Opterons is that the microcode patch led the system to resets of unknown origin. As a matter of fact, our machine kept on resetting at the exact same spot as yours. Try uncommenting the entry in the microcode lookup table and see how far your code gets. The rather akward output of what seems to be multiple cores writing to the serial console at the same time has been discussed in other threads afaik and remains an issue to be solved. Up until know, it did not keep our systems from booting and only seems to be a temporary effect.
Best regards,
Maximilian