Hi Kevin,
great writeup! Any chance you can add that to the coreboot wiki?
On 06.05.2008 03:36, Kevin O'Connor wrote:
[...] Some of the hardware accesses made by the "legacybios" code appear to be specific to hardware in the emulator. The code attempts to enable ram shadowing of the memory segment at 0xf00000 - it does this so that
One zero too many?
it can put acpi/mptable/smbios tables into that area. After it is complete, it attempts to disable writes to that region. The code sequence looks to be specific to intel north/southbridges. It isn't necessary to disable writes to 0xf0000 (though it would be nice), but it is necessary to have the ability to alter that memory. Also, there are stubs in "legacybios" for apm support - should one want to implement this on real hardware the appropriate power saving code would need to be implemented.
Regards, Carl-Daniel