ron minnich wrote:
no hardware on v3. There is an almost-done geode port.
We can use the help
ron
Hmm, I have no geode (except an NX kicking around somewhere), but I'm looking at the c7, cn700, and vt8237r. I've ported most of the northbridge and superio code, next comes the southbridge. A couple questions, if you don't mind too much:
In the dts: pcipath = "x,y";
x and y are device and function, correct? (only ask because it looks odd on some of them). How do we handle devices on another bus?
Where should/is serial init done? For a separate superio should it be in the initram main(), or is it handled by dts/Kconfig magic? Is calling uart/console init still necessary?
What's needed for cache as ram (on via c3/7)? Should the generic stage0_i586.S do the trick (or be made to do the trick)? And will/should each cpu have its own folder like in v2, or is there some better and more generic plan?
Sorry for all the questions, but it's a bit difficult to figure out when the only examples are geode and emulation ;)
Thanks, Corey