Hello Konrad,
Sunday, January 21, 2018, 9:02:30 AM, you wrote:
KE> I would like to control the DCI and Debug bits in the boot process KE> and dont want to mess with the AMI bios patching.
You can probably set the DCI enable bit in the PCH softstraps in the descriptor, no need to mess with the BIOS editing. It seems to be bit 17 in strap 0, right next to the HAP bit:
<LayoutEntry name="PchStrapDciEnabled" type="bitfield32" value="0x1" offset="0x0" bitfield_high="17" bitfield_low="17" /> <LayoutEntry name="reserve_hap" type="bitfield32" value="0x0" offset="0x0" bitfield_high="16" bitfield_low="16" />
(xml from the Intel Flash Image Tool).
KE> I was wondering weather KE> there is a port that is near enough so that it might boot at lease long enough KE> so that I can hook up with the DCI cable... I think there are some Skylake-based boards in the tree (using Intel FSP), you could try to start with those if you want to go down that road.
KE> 2018-01-20 23:56 GMT+00:00 Taiidan@gmx.com Taiidan@gmx.com:
KE> On 01/20/2018 06:38 PM, Konrad Eisele wrote:
KE> Is there a chance to get coreboot running KE> on a GB-BKi5HA-7200 (i5-7200 Kabylake) or KE> a GB-BSi3-6100 (i3-6100 Skylake)?
KE> You would have to do a port, which requires you have extensive KE> programming skills or a large amount of money to pay someone to do it.
KE> What are you hoping to get out of coreboot? maybe there is an KE> already supported board that would suit you?