Support for AMD's latest G-Series system-on-chip (SoC) family of x86 processors has been fully released into the coreboot community. I very much appreciate everyone who contributed comments on the early code posted to Gerrit, specifically Kyösti, Paul, Ron, Stepan, and the folks at Sage. I think I have addressed all of the comments that I can to-date. Shoot me an e-mail if theres something I missed. Please review any of the code that interests you and post comments.
The set of patches for this release include the following:
Platform Initialization (AGESA):
The AGESA/PI code is a dump from AMDs internal BIOS team and therefore doesnt necessarily meet coreboot.org standards. The hope is that this one will see more regular updates than previous releases.
24f441d AMD Kabini: Add AGESA/PI code for new processor family (http://review.coreboot.org/#/c/3836/) 7e1b725 AMD Kabini: Add "const" modifier to AGESA function parameters (http://review.coreboot.org/#/c/3837/) 9a24f45 AMD AGESA: Add missing breaks to switch statement in one file (http://review.coreboot.org/#/c/3839/) 265edf4 AMD AGESA: Fix comment for `PCIE_DDI_DATA_INITIALIZER` (http://review.coreboot.org/#/c/3840/) 6c4c278 AMD SATA: Correct "them implement" to "then implement" in comments (http://review.coreboot.org/#/c/3841/)
AGESA Wrapper code for the Family 16 (Kabini) CPU
334df15 AMD Kabini: Add CPU AGESA wrapper for new AMD processor family (http://review.coreboot.org/#/c/3781/)
AGESA Wrapper code for the Family 16 (Kabini) northbridge / graphics
e67b533 AMD Kabini: Add northbridge AGESA wrapper (new AMD processor) (http://review.coreboot.org/#/c/3782/) 6c7cffc AMD Kabini: Add map_oprom() function for Vendor/Device IDs (http://review.coreboot.org/#/c/3806/)
AGESA Wrapper code modifications to Hudson code for the integrated southbridge (Yangtze)
480b69a AMD Kabini: Modify Hudson southbridge to support new AMD processor (http://review.coreboot.org/#/c/3783) d7cc030 AMD Hudson/Yangtze: Enable support for SATA port multipliers (http://review.coreboot.org/#/c/3808/) d71234f AMD Hudson: Add wrapper functions to enable LPC Super I/O ports (http://review.coreboot.org/#/c/3842/) Note: The original code in early_setup.c was used during Kabini/Yangtze development. It is not used on Olive Hill. By splitting it out as a separate changelist, the hope is that it will be useful on future AMD-based boards that have Super I/O chips.
AMD Olive Hill development board (DB-FT3)
44ee758 AMD Olive Hill: Add new AMD mainboard using Kabini processor (http://review.coreboot.org/#/c/3784/) fcee4b2 AMD Olive Hill: Eliminate unnecessary memory copy (http://review.coreboot.org/#/c/3818/) 6ec03a2 AMD Olive Hill: Enable HDMI audio setting in build options (http://review.coreboot.org/#/c/3814/) c6424d6 AMD Olive Hill: Change SB800 references to Yangtze (http://review.coreboot.org/#/c/3815/) 594cfc1 AMD Olive Hill: Remove default VBIOS vendor/device ID (http://review.coreboot.org/#/c/3816/) 79028f8 AMD Olive Hill: Enable WARNINGS_ARE_ERRORS (remove override) (http://review.coreboot.org/#/c/3819/)
ACPI changes for consistency with community ACPI generalization work on Persimmon, Parmer, ASUS F2A85-M:
fda169a AMD Fam16kb: Split DSDT into common sections (http://review.coreboot.org/#/c/3821/) 19b3483 AMD Fam16: Add secondary bus number to CRES method (http://review.coreboot.org/#/c/3822/) 0578a98 AMD Fam16: Add OSC method to PCI0 (http://review.coreboot.org/#/c/3823/)