Dear coreboot readers!
This is the automatic build system of coreboot.
The developer "mjones" checked in revision 6404 to the coreboot repository. This caused the following changes:
Change Log: Improving BKDG implementation of P-states, CPU and northbridge frequency and voltage handling for Fam 10 in SVI mode.
Add to init_fidvid_stage2 some step mentioned in BKDG 2.4.2.7 that was missing . Some lines are dead code now, but may handy if one day we support revison E CPUs.
Signed-off-by: Xavi Drudis Ferran xdrudis@tinet.cat Acked-by: Marc Jones marcj303@gmail.com
Build Log: Compilation of amd:bimini_fam10 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=6404&device=bimini_fam1... Compilation of amd:tilapia_fam10 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=6404&device=tilapia_fam... Compilation of gigabyte:ma785gmt is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=6404&device=ma785gmt&am...
If something broke during this checkin please be a pain in mjones's neck until the issue is fixed.
If this issue is not fixed within 24h the revision should be backed out.
Best regards, coreboot automatic build system