On Tuesday 07 July 2009 21:47:57 Peter Stuge wrote:
Harald Gutmann wrote:
PCI registers on coreboot address 0x52 (from the IDE device) has value FF while proprietary has value 99. This is the so called "CABLE_BIT".
Fair enough, but this is the "output" of coreboot. The tricky part is to find the "input" for the coreboot code. How to find out which cable type is really attached, on this chipset?
I know that, and that's the question about "when" to write the output. For a quick and dirty, compile-time option fix, this information is enough, but not for a runtime-solution.
//Peter