Hi Zheng,
On 23.12.2008 03:26, Bao, Zheng wrote:
Reviewed-by: zheng bao zheng.bao@amd.com
It is tested well on dbm690t and pistachio.
Thank you for the fast review!
Our commit process is a bit difficult because it needs an Acked-by: statement. (The subversion repository will reject a commit without Acked-by.)
Everybody who understands the code is allowed to ack a patch. You understand that piece of code very well, so could you please also add an Acked-by statement? Thanks!
Regards, Carl-Daniel
-----Original Message----- From: Carl-Daniel Hailfinger [mailto:c-d.hailfinger.devel.2006@gmx.net] Sent: Tuesday, December 23, 2008 10:01 AM To: Coreboot Cc: Bao, Zheng Subject: [PATCH] Fix SB600 SATA and add support for port 2-4
The SB600 RPR documentation does not mention what to do if SATA_BAR0+6 is no longer 0xA0 or 0xB0. It simply assumes that will never happen. My 500 GB Seagate Barracuda ST3500820AS triggers that corner case on the first init after poweron. The current code hangs forever with my drive. Fix this by rerunning the init sequence after SATA_BAR0+6 is no longer 0xA0 or 0xB0.
Add support for SATA port 2-4 (Primary Slave, Secondary Master, Secondary Slave).
Activate and improve debug messages for SPEW log level.
Fix some comments.
New log messages look like this: PCI: 00:12.0 init sata_bar0=3020 sata_bar1=3060 sata_bar2=3030 sata_bar3=3070 sata_bar4=3000 sata_bar5=fc309000 SATA port 0 status = 23 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... [... 281 repetitions ...] 0x6=0, 0x7=50 drive no longer selected after 2830 ms, retrying init drive detection done after 10 ms Primary Master device is ready SATA port 1 status = 23 drive detection done after 10 ms Primary Slave device is ready SATA port 2 status = 0 No Secondary Master SATA drive on Slot2 SATA port 3 status = 0 No Secondary Slave SATA drive on Slot3
Full log is attached.
With this patch (and my other non-SATA fixups), my Asus M2A-VM boots into Linux without problems.
Signed-off-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net