Thanks for all the replies so far! Many things to consider and try out, I am busy investigating and will get back once I have more details!
Much appreciated! Tahnia
On Wed, Oct 11, 2017 at 3:35 AM, Melissa Yi huayi@celestica.com wrote:
Hi Tahnia, Have you tried 32-bit UEFI payload? I met this problem in Denverton platfrom too with 64-bitUEFI payload.
Thanks.
Regards, Melissa Yi
BIOS Lead Engineer Celestica(Shanghai) R&D Center, China
www.celestica.com Solid Partners, Flexible Solutions
2017-10-10 16:29 GMT+08:00 Tahnia Lichtenstein unlich@gmail.com:
Hi,
I am trying to build coreboot for the Intel Apollo Lake-I reference board (Oxbow Hill, similar to Leaf Hill).
Intel has provided an implementation for this reference board based on an outdated coreboot version.
Along with the coreboot implementation, they provided a compatible pre-compiled UEFI payload (with no source, but run-time boot menu looks like Tianocore's) and a compatible pre-compiled U-Boot payload (with links to U-Boot source on Github along with patch so as to reproduce the pre-compiled binary). The pre-compiled binaries have associated .config files for coreboot integration. When building coreboot with either of the precompiled binaries, and stitching the coreboot output binaries together with Intel-provided blobs (using Intel provided FIT application) to produce the final firmware image, the firmware works as expected.
Then I built this version of coreboot with a self-compiled payload, such as Tianocore UDK2017 CorebootPayloadPkg or SeaBIOS, using the .confg files provided by Intel for UEFI payloads or legacy payloads respectively (just modified for specific payload type and path, and disabling verified and measured boot). I stitched the coreboot output with the Intel-provided blobs using the exact same method as before. Then, in run-time, coreboot transitions to the payload and nothing happens from then on (i.e. no further serial debug messages, no change to display monitor).
I also built U-Boot from github, applying Intel's patch to match Intel's precompiled binary, and this self-compiled binary works in run-time (well, sort of, there are a couple of problems but point is the payload runs). A notable build difference is that this build uses the .config file provided by Intel as is, and that the payload that was built is the binary equivalent of the Intel pre-compiled binary.
Am I not specifying the correct configuration options for Tianocore and SeaBIOS? I.e. is there more to it than just selecting the payload type and specifying the payload path? Do I need to configure or update memory addresses or ranges to match payload sizes, or some such? Do I need to make specific changes to the payloads' source code to support the platform? Any advice on how/where to start debugging?
(Serial debug logs and .config files attached.)
Best regards, Tahnia
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