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I don't know if any of this will help.. But I am posting it anyway.. I also have a call into Intel's Advanced HPC ( EPSD ) division for more answers. Maybe they can help, maybe not.
http://article.gmane.org/gmane.comp.boot-loaders.u-boot/56213
http://lists.infradead.org/pipermail/linux-mtd/2005-February/011990.html
https://dev.openwrt.org/browser/trunk/target/linux/brcm-2.4/files/arch/mips/...
http://git.denx.de/u-boot/include/flash.h
I am being as pro active as I can, hardly understanding what it is exactly that you need. Outside an exact white paper from Intel. Anything I can do, I am willing to help move this along. In the mean time, I am going to try to read the man page that I found for lbflash since I have it. It's hardly a solution I would want to rely on though.
Thanks,
Joshua McDowell
ron minnich wrote:
On Wed, May 20, 2009 at 10:59 AM, Joshua McDowell jmcdowell@issisolutions.com wrote:
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Intel® Server Board SE7520JR2 http://www.intel.com/support/motherboards/server/se7520jr2/sb/cs-013736.htm I am currently waiting for someone to power up the storage device that may contain the lbflash source code. I can tell you that lbflash uses /dev/mtdX to read and write to devices. So it may not have what you are looking for, I don't know.
that tells us a lot. We actually planned to use mtd layer in 2000 for everything, but there were continuous issues, so the stopgap flash-and-burn (which became flashrom) never stopped being used. LBFLASH went the mtd route, arguably better, it just never worked out as well for many people as flashrom.
LNXI IIRC developed LBFLASH.
The board enable magic for your board might be found in the mtd drivers. Intel habitually dedicates a GPIO pin for flash protection. You have to set the GPIO low (usually) to enable flash writing. This old mainboard certainly dates to that era.
And, it is unlikely that intel will tell you what the pin is.
rno