On Tue, Apr 06, 2010 at 04:21:57PM -0600, Myles Watson wrote:
I'm seeing code reads to memset() in coreboot_ram interleaved with byte writes to somewhere high on the stack (_estack -0x1fC). This is a k8.
I can't find the place during the RAM stage when we are calling memset with caches disabled. Does this ring a bell for anyone?
Probably not related, but I found the code at src/arch/i386/init/crt0.S.lb: movl %ebp, %esi /* FIXME: look for a proper place for the stack */ movl $0x4000000, %esp movl %esp, %ebp pushl %esi pushl $str_coreboot_ram_name call cbfs_and_run_core
to be problematic on my epia-cn back when I was running timing tests. The stack was set to 0x4000000, but that memory wasn't cached. It caused a really long delay - doubly so when lzma compression was used.
-Kevin