Quoting Peter Stuge peter@stuge.se:
On Mon, Feb 25, 2008 at 08:51:00PM -0500, Corey Osgood wrote:
- /* Set the value for DRAM Timing Register */
- /* TODO: Configure the value according to SPD values. */
- pci_write_config32(ctrl->d0, DRT, 0x00000010);
How about these two TODOs?
The memory on the rm4100 is onboard.
I guess this port could use the SPD emulation a la ALIX then?
possible? Just a fake spd_table setup for now.
The only version with memory slots is the Thomson IP1001
Perhaps another port for that, then?
Possible if you could find one. And trust me the people that do have them are not willing to share:-(
without the ability to try other memory sticks or with real spd data, it might look right on the rm4100, but fail in practice.
The problem is that this is in (supposedly) generic 830 code.
It pretty much is. First of all PC133 SO-DIMMS only come in cas3 or cas2 but setting DRT to cas3 is not hurting anything. So your memory only runs a tiny bit slower, an average user probably wouldn't notice the difference. But it does need to be done eventually (DRT). Besides DRT everything else is spd detectable. Did you check out function Corey and I came up with to get the memory size using spd 31. I still think that is pretty cool.
- /* TODO: Set offset according to DRT values */
- PRINT_DEBUG("RAM Enable 4: Mode register set\r\n");
- do_ram_command(ctrl, RAM_COMMAND_MRS, 0x1d0);
Can this be done?
Same deal as above.
Yes, exactly.
I can put together another patch later, and put the code in ifdefs with a note to that effect.
Hm? ifdef what?
//Peter
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Thanks - Joe