On 17.01.2008 01:05, Ward Vandewege wrote:
Hi Ronald and Carl-Daniel,
Great work - I want to use larger SPI chips on this board myself.
On Thu, Jan 17, 2008 at 12:56:08AM +0100, Carl-Daniel Hailfinger wrote:
I see you invested a lot of time to work around the deficiencies of the IT8716F SPI translation function. You even did it the way I described the process a few weeks ago (but I had no time to implement it).
Problem1 and Problem2 have impact on the useability of flashrom, which I have sort-of solved (patch below). Problem1 also has impact on the elfboot.c and rom-stream.c in coreboot (linuxbios), which I'm still investigating (suggestions welcome!).
I'd like to not handle this problem at all in coreboot v3.
What do you propose for v3?
Keep v3 clean, simply refuse to support such horrible interfaces in v3. Especially the lar walk code would explode to about twice the size if we wanted to support flash parts that can not be memmapped completely. There are workarounds for some of that stuff, but I'll keep them secret until someone manages to actually port a board with IT8176F SPI translation to v3. I hope that will never happen.
Regards, Carl-Daniel