[coreboot] Re: Is there a way to enable a PCI-PCI bridge on bus 3 early?

[Nico Huber]

On 11.01.24 07:03, Keith Hui wrote:
> Happy new year to you too!
>
> On Fri, 5 Jan 2024 at 09:58, Nico Huber  wrote:
> > Hi again, and a happy new year!
>
> With this code below I did just enough to enable subtractive decode in
> the root port and legacy PCI bridge (datasheet does call for doing
> both for legacy PCI mode) and nothing else. That ASM1083 just worked,
> and I finally got POST codes on PCI slot.

That is interesting, so the ASM1083 forwards port 80h without
configuration?
> However, I lost integrated graphics completely. A boot log is
> attached.

I fear it is not. Did you forget the attachment?

Can you see why this is happening?

At least I can't imagine anything that this little code could
do to VGA registers. Have you tried a graphics framebuffer?
Not sure if it can be configured without legacy i/o.
> Thanks
> Keith
>
> ----8<----
>
> void bootblock_mainboard_early_init(void)
> {
>     nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
> if (CONFIG(POST_DEVICE_PCI_PCIE)) {
>     u32 rpfn = RCBA32(RPFN);
>     /* Unhide root port 7. */
>     rpfn &= ~(1 << 27);
>     RCBA32(RPFN) = rpfn;
>     /* Get root port 7 function number. */
>     unsigned int rpfunc = (rpfn >> 24) & 0x7;
>
>     pci_devfn_t bridge = PCH_PCIE_DEV(rpfunc);
>
>     /* Enable subtractive decode (PECR3[SDE]). */
>     pci_or_config8(bridge, 0xec, 0x01);
>
>     /* Enable I/O but don't set a window. */
>     pci_s_write_config16(bridge, PCI_IO_BASE, 0x00ff);
>     pci_or_config16(bridge, PCI_COMMAND, PCI_COMMAND_IO);
>
>     /* Datasheet p.129: Have to enable subtractive decode in D30F0 too,
>      * even though Z77 doesn't natively do PCI.
>      */

I still read that it says only one device at a time. It might mention
D30F0 only due to copy-pasting from older documentation. OTOH, if this
indeed makes it work, I would be wrong.
>     pci_or_config32(PCI_DEV(0, 30, 0), 0x4c, (1 << 28));
>
>     /* POST card in the PCI slot should now receive POST codes. */
> }
>
> }