Author: cozzie Date: 2008-12-19 04:36:48 +0100 (Fri, 19 Dec 2008) New Revision: 3822
Modified: trunk/coreboot-v2/src/cpu/intel/model_f2x/model_f2x_init.c trunk/coreboot-v2/src/include/pc80/keyboard.h trunk/coreboot-v2/src/mainboard/amd/pistachio/fadt.c trunk/coreboot-v2/src/mainboard/amd/pistachio/mainboard.c trunk/coreboot-v2/src/mainboard/dell/s1850/reset.c trunk/coreboot-v2/src/northbridge/amd/amdk8/northbridge.c trunk/coreboot-v2/src/northbridge/amd/gx1/northbridge.c trunk/coreboot-v2/src/northbridge/amd/gx2/chipsetinit.c trunk/coreboot-v2/src/northbridge/amd/gx2/northbridge.c trunk/coreboot-v2/src/northbridge/amd/lx/northbridge.c trunk/coreboot-v2/src/northbridge/intel/i440bx/northbridge.c trunk/coreboot-v2/src/northbridge/intel/i855pm/northbridge.c trunk/coreboot-v2/src/southbridge/via/k8t890/k8t890.h trunk/coreboot-v2/src/southbridge/via/k8t890/k8t890_bridge.c trunk/coreboot-v2/src/southbridge/via/k8t890/k8t890_host_ctrl.c trunk/coreboot-v2/src/southbridge/via/k8t890/k8t890_pcie.c trunk/coreboot-v2/src/southbridge/via/k8t890/k8t890_traf_ctrl.c Log: Fix a LOT of implicit function declarations before they become errors.
Signed-off-by: Corey Osgood corey.osgood@gmail.com Acked-by: Myles Watson mylesgw@gmail.com
Modified: trunk/coreboot-v2/src/cpu/intel/model_f2x/model_f2x_init.c =================================================================== --- trunk/coreboot-v2/src/cpu/intel/model_f2x/model_f2x_init.c 2008-12-19 03:33:37 UTC (rev 3821) +++ trunk/coreboot-v2/src/cpu/intel/model_f2x/model_f2x_init.c 2008-12-19 03:36:48 UTC (rev 3822) @@ -8,6 +8,7 @@ #include <cpu/x86/msr.h> #include <cpu/x86/lapic.h> #include <cpu/intel/microcode.h> +#include <cpu/intel/hyperthreading.h> #include <cpu/x86/cache.h> #include <cpu/x86/mtrr.h>
Modified: trunk/coreboot-v2/src/include/pc80/keyboard.h =================================================================== --- trunk/coreboot-v2/src/include/pc80/keyboard.h 2008-12-19 03:33:37 UTC (rev 3821) +++ trunk/coreboot-v2/src/include/pc80/keyboard.h 2008-12-19 03:36:48 UTC (rev 3822) @@ -6,5 +6,6 @@ };
void init_pc_keyboard(unsigned port0, unsigned port1, struct pc_keyboard *kbd); +void set_kbc_ps2_mode(void);
#endif /* PC80_KEYBOARD_H */
Modified: trunk/coreboot-v2/src/mainboard/amd/pistachio/fadt.c =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/pistachio/fadt.c 2008-12-19 03:33:37 UTC (rev 3821) +++ trunk/coreboot-v2/src/mainboard/amd/pistachio/fadt.c 2008-12-19 03:36:48 UTC (rev 3822) @@ -26,6 +26,7 @@ #include <arch/acpi.h> #include <arch/io.h>
+extern void pm_iowrite(u8 reg, u8 value); /*extern*/ u16 pm_base = 0x800; /* pm_base should be set in sb acpi */ /* pm_base should be got from bar2 of rs690. Here I compact ACPI
Modified: trunk/coreboot-v2/src/mainboard/amd/pistachio/mainboard.c =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/pistachio/mainboard.c 2008-12-19 03:33:37 UTC (rev 3821) +++ trunk/coreboot-v2/src/mainboard/amd/pistachio/mainboard.c 2008-12-19 03:36:48 UTC (rev 3822) @@ -37,6 +37,9 @@ extern int do_smbus_read_byte(u32 smbus_io_base, u32 device, u32 address); extern int do_smbus_write_byte(u32 smbus_io_base, u32 device, u32 address, u8 val); +extern void lb_add_memory_range(struct lb_memory *mem, uint32_t type, + uint64_t start, uint64_t size); + #define ADT7475_read_byte(address) \ do_smbus_read_byte(SMBUS_IO_BASE, ADT7475_ADDRESS, address) #define ADT7475_write_byte(address, val) \
Modified: trunk/coreboot-v2/src/mainboard/dell/s1850/reset.c =================================================================== --- trunk/coreboot-v2/src/mainboard/dell/s1850/reset.c 2008-12-19 03:33:37 UTC (rev 3821) +++ trunk/coreboot-v2/src/mainboard/dell/s1850/reset.c 2008-12-19 03:36:48 UTC (rev 3822) @@ -1,4 +1,5 @@ #include <arch/io.h> +#include <device/pci.h> #include <device/pci_def.h> #include <device/pci_ids.h> #ifndef __ROMCC__
Modified: trunk/coreboot-v2/src/northbridge/amd/amdk8/northbridge.c =================================================================== --- trunk/coreboot-v2/src/northbridge/amd/amdk8/northbridge.c 2008-12-19 03:33:37 UTC (rev 3821) +++ trunk/coreboot-v2/src/northbridge/amd/amdk8/northbridge.c 2008-12-19 03:36:48 UTC (rev 3822) @@ -16,6 +16,7 @@ #include <string.h> #include <bitops.h> #include <cpu/cpu.h> +#include <cpu/amd/model_fxx_rev.h>
#include <cpu/x86/lapic.h>
Modified: trunk/coreboot-v2/src/northbridge/amd/gx1/northbridge.c =================================================================== --- trunk/coreboot-v2/src/northbridge/amd/gx1/northbridge.c 2008-12-19 03:33:37 UTC (rev 3821) +++ trunk/coreboot-v2/src/northbridge/amd/gx1/northbridge.c 2008-12-19 03:36:48 UTC (rev 3822) @@ -11,6 +11,7 @@ #include "northbridge.h" #include <cpu/amd/gx1def.h> #include <cpu/x86/cache.h> +#include <cpu/cpu.h>
#define NORTHBRIDGE_FILE "northbridge.c" /*
Modified: trunk/coreboot-v2/src/northbridge/amd/gx2/chipsetinit.c =================================================================== --- trunk/coreboot-v2/src/northbridge/amd/gx2/chipsetinit.c 2008-12-19 03:33:37 UTC (rev 3821) +++ trunk/coreboot-v2/src/northbridge/amd/gx2/chipsetinit.c 2008-12-19 03:36:48 UTC (rev 3822) @@ -14,7 +14,7 @@ #include <cpu/x86/cache.h> #include "../../../southbridge/amd/cs5536/cs5536.h"
- +extern int sizeram(void); /* the structs in this file only set msr.lo. But ... that may not always be true */
struct msrinit {
Modified: trunk/coreboot-v2/src/northbridge/amd/gx2/northbridge.c =================================================================== --- trunk/coreboot-v2/src/northbridge/amd/gx2/northbridge.c 2008-12-19 03:33:37 UTC (rev 3821) +++ trunk/coreboot-v2/src/northbridge/amd/gx2/northbridge.c 2008-12-19 03:36:48 UTC (rev 3822) @@ -13,6 +13,7 @@ #include <cpu/x86/msr.h> #include <cpu/x86/cache.h> #include <cpu/amd/vr.h> +#include <cpu/cpu.h> #include "../../../southbridge/amd/cs5536/cs5536.h" #define VIDEO_MB 8
Modified: trunk/coreboot-v2/src/northbridge/amd/lx/northbridge.c =================================================================== --- trunk/coreboot-v2/src/northbridge/amd/lx/northbridge.c 2008-12-19 03:33:37 UTC (rev 3821) +++ trunk/coreboot-v2/src/northbridge/amd/lx/northbridge.c 2008-12-19 03:36:48 UTC (rev 3822) @@ -32,6 +32,7 @@ #include <cpu/x86/msr.h> #include <cpu/x86/cache.h> #include <cpu/amd/vr.h> +#include <cpu/cpu.h> #include "chip.h" #include "northbridge.h" #include "../../../southbridge/amd/cs5536/cs5536.h"
Modified: trunk/coreboot-v2/src/northbridge/intel/i440bx/northbridge.c =================================================================== --- trunk/coreboot-v2/src/northbridge/intel/i440bx/northbridge.c 2008-12-19 03:33:37 UTC (rev 3821) +++ trunk/coreboot-v2/src/northbridge/intel/i440bx/northbridge.c 2008-12-19 03:36:48 UTC (rev 3822) @@ -7,6 +7,8 @@ #include <stdlib.h> #include <string.h> #include <bitops.h> +#include <cpu/cpu.h> +#include <pc80/keyboard.h> #include "chip.h" #include "northbridge.h" #include "i440bx.h"
Modified: trunk/coreboot-v2/src/northbridge/intel/i855pm/northbridge.c =================================================================== --- trunk/coreboot-v2/src/northbridge/intel/i855pm/northbridge.c 2008-12-19 03:33:37 UTC (rev 3821) +++ trunk/coreboot-v2/src/northbridge/intel/i855pm/northbridge.c 2008-12-19 03:36:48 UTC (rev 3822) @@ -3,6 +3,7 @@ #include <stdint.h> #include <device/device.h> #include <device/pci.h> +#include <device/pci_ids.h> #include <stdlib.h> #include <string.h> #include <bitops.h> @@ -13,7 +14,6 @@ static void pci_domain_read_resources(device_t dev) { struct resource *resource; - unsigned reg;
/* Initialize the system wide io space constraints */ resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
Modified: trunk/coreboot-v2/src/southbridge/via/k8t890/k8t890.h =================================================================== --- trunk/coreboot-v2/src/southbridge/via/k8t890/k8t890.h 2008-12-19 03:33:37 UTC (rev 3821) +++ trunk/coreboot-v2/src/southbridge/via/k8t890/k8t890.h 2008-12-19 03:36:48 UTC (rev 3822) @@ -35,4 +35,8 @@ /* the FB size in MB (min is 8MB max is 512MB) */ #define K8M890_FBSIZEMB 64
+#include <device/device.h> +extern void writeback(struct device *dev, u16 where, u8 what); +extern void dump_south(device_t dev); + #endif
Modified: trunk/coreboot-v2/src/southbridge/via/k8t890/k8t890_bridge.c =================================================================== --- trunk/coreboot-v2/src/southbridge/via/k8t890/k8t890_bridge.c 2008-12-19 03:33:37 UTC (rev 3821) +++ trunk/coreboot-v2/src/southbridge/via/k8t890/k8t890_bridge.c 2008-12-19 03:36:48 UTC (rev 3822) @@ -21,6 +21,7 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <console/console.h> +#include "k8t890.h"
static void bridge_enable(struct device *dev) {
Modified: trunk/coreboot-v2/src/southbridge/via/k8t890/k8t890_host_ctrl.c =================================================================== --- trunk/coreboot-v2/src/southbridge/via/k8t890/k8t890_host_ctrl.c 2008-12-19 03:33:37 UTC (rev 3821) +++ trunk/coreboot-v2/src/southbridge/via/k8t890/k8t890_host_ctrl.c 2008-12-19 03:36:48 UTC (rev 3822) @@ -22,6 +22,7 @@ #include <device/pci_ops.h> #include <device/pci_ids.h> #include <console/console.h> +#include "k8t890.h"
/* this may be later merged */
Modified: trunk/coreboot-v2/src/southbridge/via/k8t890/k8t890_pcie.c =================================================================== --- trunk/coreboot-v2/src/southbridge/via/k8t890/k8t890_pcie.c 2008-12-19 03:33:37 UTC (rev 3821) +++ trunk/coreboot-v2/src/southbridge/via/k8t890/k8t890_pcie.c 2008-12-19 03:36:48 UTC (rev 3822) @@ -22,6 +22,7 @@ #include <device/pci.h> #include <device/pciexp.h> #include <device/pci_ids.h> +#include "k8t890.h"
static void peg_init(struct device *dev) {
Modified: trunk/coreboot-v2/src/southbridge/via/k8t890/k8t890_traf_ctrl.c =================================================================== --- trunk/coreboot-v2/src/southbridge/via/k8t890/k8t890_traf_ctrl.c 2008-12-19 03:33:37 UTC (rev 3821) +++ trunk/coreboot-v2/src/southbridge/via/k8t890/k8t890_traf_ctrl.c 2008-12-19 03:36:48 UTC (rev 3822) @@ -23,6 +23,8 @@ #include <console/console.h> #include "k8t890.h"
+extern unsigned long log2(unsigned long x); + static void mmconfig_set_resources(device_t dev) { struct resource *resource;