On 17.01.2008 02:18, ron minnich wrote:
On Jan 11, 2008 4:01 PM, Marc Jones marc.jones@amd.com wrote:
Ron,
I think I am up to the same point you are. It looks like there is a problem in the device scanning.
void dev_phase2(void) should call geodelx_pci_domain_phase2() for the southbridge device.
Here is the output. Is this the correct order? It seems strange.
Phase 2: Early setup... dev_phase2: dev root: dev_phase2: dev cpus: dev_phase2: dev device0_0: dev_phase2: dev southbridge: dev_phase2: dev domain0: Phase 2: Done.
I just realized there was no dts in northbridge/amd/geodelx ... this is a possible problem.
Add a dts for the geode northbridge.
Signed-off-by: Ronald G. Minnich rminnich@gmail.com
If it works or at least improves the situation, the patch is Acked-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
Please try to be more verbose in your changelog.
Regards, Carl-Daniel