Author: myles Date: Wed Oct 20 21:23:22 2010 New Revision: 5977 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5977
Log: Now that no boards set RAMBASE < 1M, get rid of some dead code. Trivial.
It's probably time to reconsider moving all fam10 boards to RAMBASE = 1M.
Signed-off-by: Myles Watson mylesgw@gmail.com Acked-by: Myles Watson mylesgw@gmail.com
Modified: trunk/src/arch/i386/coreboot_ram.ld trunk/src/cpu/x86/pae/pgtbl.c
Modified: trunk/src/arch/i386/coreboot_ram.ld ============================================================================== --- trunk/src/arch/i386/coreboot_ram.ld Tue Oct 19 23:08:11 2010 (r5976) +++ trunk/src/arch/i386/coreboot_ram.ld Wed Oct 20 21:23:22 2010 (r5977) @@ -106,13 +106,6 @@ } _eheap = .;
- /* Some assertions to print human readable errors for certain linker - * error scenarios. - */ - - /* Avoid running into 0xa0000-0xfffff */ - _bogus = ASSERT(CONFIG_RAMBASE >= 0x100000 || _eheap < 0xa0000, "Please move RAMBASE to 1MB"); - /* The ram segment. This includes all memory used by the memory * resident copy of coreboot, except the tables that are produced on * the fly, but including stack and heap. @@ -125,13 +118,6 @@ */ _bogus = ASSERT( ( _eram_seg < (CONFIG_RAMTOP)) , "Please increase CONFIG_RAMTOP");
- /* This rule is only good for the few broken targets that still live - * below 1MB per default. Those are the Geode and VIA targets that come - * with their own version of real mode switches that can't live above - * 1MB. Once these are fixed, this rule should go away. - */ - _bogus = ASSERT( !((CONFIG_CONSOLE_VGA || CONFIG_PCI_ROM_RUN || CONFIG_VGA_ROM_RUN || CONFIG_HAVE_SMI_HANDLER) && ((_ram_seg<0xa0000) && (_eram_seg>0xa0000))), "Please increase CONFIG_RAMTOP and if still fail, try to set CONFIG_RAMBASE to 1M"); - /* Discard the sections we don't need/want */
/DISCARD/ : {
Modified: trunk/src/cpu/x86/pae/pgtbl.c ============================================================================== --- trunk/src/cpu/x86/pae/pgtbl.c Tue Oct 19 23:08:11 2010 (r5976) +++ trunk/src/cpu/x86/pae/pgtbl.c Wed Oct 20 21:23:22 2010 (r5977) @@ -54,24 +54,7 @@ struct pde pdp[512]; } __attribute__ ((packed));
-#if (CONFIG_RAMTOP>0x100000) && (CONFIG_RAMBASE<0x100000) && ((CONFIG_CONSOLE_VGA==1) || (CONFIG_PCI_ROM_RUN == 1)) - /* - pgtbl is too big, so use last one 1M before CONFIG_LB_MEM_TOP, otherwise for 8 way dual core with vga support will push stack and heap cross 0xa0000, - and that region need to be used as vga font buffer. Please make sure set CONFIG_RAMTOP=0x200000 in MB Config - */ - struct pg_table *pgtbl = (struct pg_table*)0x100000; //1M - - unsigned x_end = 0x100000 + sizeof(struct pg_table) * CONFIG_MAX_CPUS; -#if (0x100000+20480*CONFIG_MAX_CPUS) > (CONFIG_RAMTOP) - #warning "We may need to increase CONFIG_RAMTOP, it need to be more than (0x100000+20480*CONFIG_MAX_CPUS)\n" -#endif - if(x_end > (CONFIG_RAMTOP)) { - printk(BIOS_DEBUG, "map_2M_page: Please increase the CONFIG_RAMTOP more than %dK\n", x_end); - die("Can not go on"); - } -#else static struct pg_table pgtbl[CONFIG_MAX_CPUS] __attribute__ ((aligned(4096))); -#endif static unsigned long mapped_window[CONFIG_MAX_CPUS]; unsigned long index; unsigned long window;