On Thu, Feb 25, 2010 at 7:58 AM, Piotr Piwko piotr.piwko@gmail.com wrote:
2010/2/24 Myles Watson mylesgw@gmail.com:
Given the boot logs it's very possible that someone on the list will fix it for you. In most cases it only takes a few iterations.
We were discussing about fixing this coreboot-v3 bug in my previous thread (http://www.mail-archive.com/coreboot@coreboot.org/msg21110.html) and I didn't get any positive results. I think that the memory controller initialization process is not carried out in the proper way. I've even talked with AMD guys who gave me some hints, but unfortunately it must be postponed for a while and wait for my free time.
They have some objections about the following registers:
- MC_CF1017_DATA (0x2000001a) should be equal something more like
0x00000000_140DD101 instead of 0x00000000_00000101
- GLCP_DELAY_CONTROLS (0x4c00000f) should be closer to something like
0xF2F100FF_56960004
I think you are correct. This looks like the memory init is not able to get correct information from the SPD. If that is the problem, you should check that the SMBus controller setup is correct.
Marc