I have applied your fix and booted it up on a Tyan S2885 mainboard with four banks full, but have not noticed any change in non-reserved registers on the AMD 8111. Can you please elaborate on exactly what changes I might observe? I want to check out the specifications on the memory we're using and make sure we're getting the right values.
On Tue, 16 Mar 2004, Craig C Forney wrote:
I ran into a problem with a Dual Opeteron cPCI board we developed with 4 banks of memory. It showed up when the third and fourth banks were populated. I narrowed it down to a problem in src/amd/amdk8/raminit.c. There is a '+' where there should be a '*', causing the SPD settings to get corrupted, which causes bizarre results which varies depending on the memory parameters read from the DIMMs. One possible result is that some DIMMs will work marginally because one or more of their settings has been corrupted.
This patch seems to resolve the problem. I'm not sure if anybody else out there is accessing 4 banks of memory via the Opteron memory interface, so it might be just us, but it would probably be a good idea to commit this patch to the freebios2 source tree. Can someone take this on?
Thanks,
Craig Forney Opus Innovations LLC
diff -Naur raminit.c.orig raminit.c --- raminit.c.orig 2004-03-16 13:25:05.000000000 -0800 +++ raminit.c 2004-03-16 13:42:30.000000000 -0800 @@ -924,7 +924,7 @@ sz.side2 = 0; } map = pci_read_config32(ctrl->f2, DRAM_BANK_ADDR_MAP);
- map &= ~(0xf << (index + 4));
map &= ~(0xf << (index * 4));
/* For each base register.
- Place the dimm size in 32 MB quantities in the bits 31 - 21.
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