Florian Zumbiehl just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/386
-gerrit
commit 75cc36ec6a857bfcd6701e3662f5ba0efb1abc95 Author: Florian Zumbiehl florz@florz.de Date: Mon Nov 21 03:10:47 2011 +0100
make INT[EFGH]# of vt8237 configurable via devicetree
Change-Id: I70202d81ddd1b0a00eddca4acabc621e5783e805 Signed-off-by: Florian Zumbiehl florz@florz.de --- src/southbridge/via/vt8237r/chip.h | 2 ++ src/southbridge/via/vt8237r/lpc.c | 21 ++++++++++++++++++--- 2 files changed, 20 insertions(+), 3 deletions(-)
diff --git a/src/southbridge/via/vt8237r/chip.h b/src/southbridge/via/vt8237r/chip.h index 2e24fac..be5e7fc 100644 --- a/src/southbridge/via/vt8237r/chip.h +++ b/src/southbridge/via/vt8237r/chip.h @@ -69,6 +69,8 @@ struct southbridge_via_vt8237r_config {
u8 usb2_dpll_set; u8 usb2_dpll_delay; + + u8 no_int_efgh; };
#endif /* SOUTHBRIDGE_VIA_VT8237R_CHIP_H */ diff --git a/src/southbridge/via/vt8237r/lpc.c b/src/southbridge/via/vt8237r/lpc.c index 207dfdb..5aac518 100644 --- a/src/southbridge/via/vt8237r/lpc.c +++ b/src/southbridge/via/vt8237r/lpc.c @@ -67,6 +67,8 @@ static void pci_routing_fixup(struct device *dev) { #if CONFIG_EPIA_VT8237R_INIT device_t pdev; +#else + struct southbridge_via_vt8237r_config *cfg; #endif
/* PCI PNP Interrupt Routing INTE/F - disable */ @@ -124,8 +126,14 @@ static void pci_routing_fixup(struct device *dev) pci_write_config8(pdev, PCI_INTERRUPT_LINE, 0xFF);
#else - /* Route INTE-INTH through registers above, no map to INTA-INTD. */ - pci_write_config8(dev, 0x46, 0x10); + cfg = dev->chip_info; + + if (cfg && cfg->no_int_efgh) { + pci_write_config8(dev, 0x46, 0x00); + } else { + /* Route INTE-INTH through registers above, no map to INTA-INTD. */ + pci_write_config8(dev, 0x46, 0x10); + }
/* PCI Interrupt Polarity */ pci_write_config8(dev, 0x54, 0x00); @@ -421,10 +429,13 @@ static void vt8237s_init(struct device *dev) static void vt8237_common_init(struct device *dev) { u8 enables, byte; + struct southbridge_via_vt8237r_config *cfg; #if !CONFIG_EPIA_VT8237R_INIT unsigned char pwr_on; #endif
+ cfg = dev->chip_info; + /* Enable addr/data stepping. */ byte = pci_read_config8(dev, PCI_COMMAND); byte |= PCI_COMMAND_WAIT; @@ -509,7 +520,11 @@ static void vt8237_common_init(struct device *dev) * | bit 1=1 works for Aaron at VIA, bit 1=0 works for jakllsch * 0 | Dynamic Clock Gating Main Switch (1=Enable) */ - pci_write_config8(dev, 0x5b, 0xb); + if (cfg && cfg->no_int_efgh) { + pci_write_config8(dev, 0x5b, 0x9); + } else { + pci_write_config8(dev, 0x5b, 0xb); + }
/* configure power state of the board after loss of power */ if (get_option(&pwr_on, "power_on_after_fail") < 0)