Re: [coreboot] about Intel calpella board(I3+QM57)

[Peter Stuge]

Hello,

zxy__1127 wrote:
> I have worked on this board two weeks,now it can print from serial
> port,

This is a very important first step! Good news.
> and stop at ddr3 initialling in file romstage.c.
> I found it difficult to deal with it.

I can understand that. Memory initialization is the most complex task
in coreboot, and require many details to be exactly right, including
e.g. the sequence of steps and timing between steps.
> Is there anyone working on it?

My guess is no.

However, since you have the serial port working, you could try to use
SerialICE (see http://serialice.org/ ) to get a better understanding
of the operations done by the factory BIOS. This can help to create
the code needed in coreboot to bring up a board.

//Peter