Patrick Georgi (patrick@georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/684
-gerrit
commit cd48a8a2c968c711cc2aa61bc551f791c8e0d786 Author: Kyösti Mälkki kyosti.malkki@gmail.com Date: Fri Feb 24 16:08:18 2012 +0200
Intel northbridge I945: Apply un-written naming rules
Use NORTHBRIDGE_INTEL_I945 to select the driver directory for build.
Use _SUBTYPE_945GC and _SUBTYPE_945GM to define at compile-time which model of I945 the driver is built for.
Change-Id: I11b1e0998d0fc28f8946bad4f0989036a9b18af4 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- src/mainboard/getac/p470/Kconfig | 3 ++- src/mainboard/ibase/mb899/Kconfig | 3 ++- src/mainboard/intel/d945gclf/Kconfig | 3 ++- src/mainboard/kontron/986lcd-m/Kconfig | 3 ++- src/mainboard/lenovo/t60/Kconfig | 3 ++- src/mainboard/lenovo/x60/Kconfig | 3 ++- src/mainboard/roda/rk886ex/Kconfig | 3 ++- src/northbridge/intel/Makefile.inc | 3 +-- src/northbridge/intel/i945/Kconfig | 14 +++++++++----- src/northbridge/intel/i945/early_init.c | 4 ++-- src/northbridge/intel/i945/raminit.c | 18 +++++++++--------- 11 files changed, 35 insertions(+), 25 deletions(-)
diff --git a/src/mainboard/getac/p470/Kconfig b/src/mainboard/getac/p470/Kconfig index 6ca11e5..42ce0e0 100644 --- a/src/mainboard/getac/p470/Kconfig +++ b/src/mainboard/getac/p470/Kconfig @@ -22,7 +22,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select ARCH_X86 select CPU_INTEL_SOCKET_MFCPGA478 - select NORTHBRIDGE_INTEL_I945GM + select NORTHBRIDGE_INTEL_I945 + select NORTHBRIDGE_INTEL_SUBTYPE_I945GM select CHECK_SLFRCS_ON_RESUME select SOUTHBRIDGE_INTEL_I82801GX select SOUTHBRIDGE_TI_PCIXX12 diff --git a/src/mainboard/ibase/mb899/Kconfig b/src/mainboard/ibase/mb899/Kconfig index ac87466..58d1d99 100644 --- a/src/mainboard/ibase/mb899/Kconfig +++ b/src/mainboard/ibase/mb899/Kconfig @@ -4,7 +4,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select ARCH_X86 select CPU_INTEL_SOCKET_MFCPGA478 - select NORTHBRIDGE_INTEL_I945GM + select NORTHBRIDGE_INTEL_I945 + select NORTHBRIDGE_INTEL_SUBTYPE_I945GM select CHECK_SLFRCS_ON_RESUME select SOUTHBRIDGE_INTEL_I82801GX select SUPERIO_WINBOND_W83627EHG diff --git a/src/mainboard/intel/d945gclf/Kconfig b/src/mainboard/intel/d945gclf/Kconfig index efc8025..32ef3e1 100644 --- a/src/mainboard/intel/d945gclf/Kconfig +++ b/src/mainboard/intel/d945gclf/Kconfig @@ -22,7 +22,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select ARCH_X86 select CPU_INTEL_SOCKET_441 - select NORTHBRIDGE_INTEL_I945GC + select NORTHBRIDGE_INTEL_I945 + select NORTHBRIDGE_INTEL_SUBTYPE_I945GC select CHECK_SLFRCS_ON_RESUME select SOUTHBRIDGE_INTEL_I82801GX select SUPERIO_SMSC_LPC47M15X diff --git a/src/mainboard/kontron/986lcd-m/Kconfig b/src/mainboard/kontron/986lcd-m/Kconfig index ec5c073..e50bf1f 100644 --- a/src/mainboard/kontron/986lcd-m/Kconfig +++ b/src/mainboard/kontron/986lcd-m/Kconfig @@ -4,7 +4,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select ARCH_X86 select CPU_INTEL_SOCKET_MFCPGA478 - select NORTHBRIDGE_INTEL_I945GM + select NORTHBRIDGE_INTEL_I945 + select NORTHBRIDGE_INTEL_SUBTYPE_I945GM select CHECK_SLFRCS_ON_RESUME select SOUTHBRIDGE_INTEL_I82801GX select SUPERIO_WINBOND_W83627THG diff --git a/src/mainboard/lenovo/t60/Kconfig b/src/mainboard/lenovo/t60/Kconfig index d1abcf6..8bb2d2d 100644 --- a/src/mainboard/lenovo/t60/Kconfig +++ b/src/mainboard/lenovo/t60/Kconfig @@ -4,7 +4,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select ARCH_X86 select CPU_INTEL_SOCKET_MFCPGA478 - select NORTHBRIDGE_INTEL_I945GM + select NORTHBRIDGE_INTEL_I945 + select NORTHBRIDGE_INTEL_SUBTYPE_I945GM select SOUTHBRIDGE_INTEL_I82801GX select SUPERIO_NSC_PC87382 select SUPERIO_NSC_PC87384 diff --git a/src/mainboard/lenovo/x60/Kconfig b/src/mainboard/lenovo/x60/Kconfig index 69f83a8..3fdfe2f 100644 --- a/src/mainboard/lenovo/x60/Kconfig +++ b/src/mainboard/lenovo/x60/Kconfig @@ -4,7 +4,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select ARCH_X86 select CPU_INTEL_SOCKET_MFCPGA478 - select NORTHBRIDGE_INTEL_I945GM + select NORTHBRIDGE_INTEL_I945 + select NORTHBRIDGE_INTEL_SUBTYPE_I945GM select SOUTHBRIDGE_INTEL_I82801GX select SOUTHBRIDGE_RICOH_RL5C476 select SUPERIO_NSC_PC87382 diff --git a/src/mainboard/roda/rk886ex/Kconfig b/src/mainboard/roda/rk886ex/Kconfig index d5de7dc..53b475c 100644 --- a/src/mainboard/roda/rk886ex/Kconfig +++ b/src/mainboard/roda/rk886ex/Kconfig @@ -4,7 +4,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select ARCH_X86 select CPU_INTEL_SOCKET_MFCPGA478 - select NORTHBRIDGE_INTEL_I945GM + select NORTHBRIDGE_INTEL_I945 + select NORTHBRIDGE_INTEL_SUBTYPE_I945GM select CHECK_SLFRCS_ON_RESUME select SOUTHBRIDGE_INTEL_I82801GX select SOUTHBRIDGE_TI_PCI7420 diff --git a/src/northbridge/intel/Makefile.inc b/src/northbridge/intel/Makefile.inc index c599dab..6153052 100644 --- a/src/northbridge/intel/Makefile.inc +++ b/src/northbridge/intel/Makefile.inc @@ -8,7 +8,6 @@ subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I440LX) += i440lx subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I82810) += i82810 subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I82830) += i82830 subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I855) += i855 -subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I945GC) += i945 -subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I945GM) += i945 +subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I945) += i945 subdirs-$(CONFIG_NORTHBRIDGE_INTEL_SCH) += sch subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I5000) += i5000 diff --git a/src/northbridge/intel/i945/Kconfig b/src/northbridge/intel/i945/Kconfig index 42cc7ce..093411f 100644 --- a/src/northbridge/intel/i945/Kconfig +++ b/src/northbridge/intel/i945/Kconfig @@ -17,15 +17,19 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-config NORTHBRIDGE_INTEL_I945GC +config NORTHBRIDGE_INTEL_I945 bool - select HAVE_DEBUG_RAM_SETUP
-config NORTHBRIDGE_INTEL_I945GM - bool +if NORTHBRIDGE_INTEL_I945 + +config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy + def_bool y select HAVE_DEBUG_RAM_SETUP
-if NORTHBRIDGE_INTEL_I945GC || NORTHBRIDGE_INTEL_I945GM +config NORTHBRIDGE_INTEL_SUBTYPE_I945GC + def_bool n +config NORTHBRIDGE_INTEL_SUBTYPE_I945GM + def_bool n
config VGA_BIOS_ID string diff --git a/src/northbridge/intel/i945/early_init.c b/src/northbridge/intel/i945/early_init.c index 14c66c4..f27dca0 100644 --- a/src/northbridge/intel/i945/early_init.c +++ b/src/northbridge/intel/i945/early_init.c @@ -91,7 +91,7 @@ static void i945m_detect_chipset(void) printk(BIOS_INFO, "unknown max. RAM clock (%02x).", reg8); /* Others reserved. */ } printk(BIOS_DEBUG, "\n"); -#if CONFIG_NORTHBRIDGE_INTEL_I945GC +#if CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC printk(BIOS_ERR, "coreboot is compiled for the wrong chipset.\n"); #endif } @@ -140,7 +140,7 @@ static void i945_detect_chipset(void) printk(BIOS_INFO, "unknown max. RAM clock (%02x).", reg8); /* Others reserved. */ } printk(BIOS_DEBUG, "\n"); -#if CONFIG_NORTHBRIDGE_INTEL_I945GM +#if CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM printk(BIOS_ERR, "coreboot is compiled for the wrong chipset.\n"); #endif } diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c index a4512d7..478a9c8 100644 --- a/src/northbridge/intel/i945/raminit.c +++ b/src/northbridge/intel/i945/raminit.c @@ -113,7 +113,7 @@ void sdram_dump_mchbar_registers(void) static int memclk(void) { int offset = 0; -#if CONFIG_NORTHBRIDGE_INTEL_I945GM +#if CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM offset++; #endif switch (((MCHBAR32(CLKCFG) >> 4) & 7) - offset) { @@ -125,7 +125,7 @@ static int memclk(void) return -1; }
-#if CONFIG_NORTHBRIDGE_INTEL_I945GM +#if CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM static u16 fsbclk(void) { switch (MCHBAR32(CLKCFG) & 7) { @@ -136,7 +136,7 @@ static u16 fsbclk(void) } return 0xffff; } -#elif CONFIG_NORTHBRIDGE_INTEL_I945GC +#elif CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC static u16 fsbclk(void) { switch (MCHBAR32(CLKCFG) & 7) { @@ -1075,7 +1075,7 @@ static const u32 *slew_group_lookup(int dual_channel, int index) return nc; }
-#if CONFIG_NORTHBRIDGE_INTEL_I945GM +#if CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM /* Strength multiplier tables */ static const u8 dual_channel_strength_multiplier[] = { 0x44, 0x11, 0x11, 0x11, 0x44, 0x44, 0x44, 0x11, @@ -1130,7 +1130,7 @@ static const u8 single_channel_strength_multiplier[] = { 0x33, 0x00, 0x00, 0x11, 0x00, 0x44, 0x33, 0x11, 0x33, 0x00, 0x11, 0x00, 0x44, 0x44, 0x33, 0x11 }; -#elif CONFIG_NORTHBRIDGE_INTEL_I945GC +#elif CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC static const u8 dual_channel_strength_multiplier[] = { 0x44, 0x22, 0x00, 0x00, 0x44, 0x44, 0x44, 0x22, 0x44, 0x22, 0x00, 0x00, 0x44, 0x44, 0x44, 0x22, @@ -2186,7 +2186,7 @@ static void sdram_program_clock_crossing(void) /** * We add the indices according to our clocks from CLKCFG. */ -#if CONFIG_NORTHBRIDGE_INTEL_I945GM +#if CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM static const u32 data_clock_crossing[] = { 0x00100401, 0x00000000, /* DDR400 FSB400 */ 0xffffffff, 0xffffffff, /* nonexistant */ @@ -2231,7 +2231,7 @@ static void sdram_program_clock_crossing(void) 0xffffffff, 0xffffffff, /* nonexistant */ };
-#elif CONFIG_NORTHBRIDGE_INTEL_I945GC +#elif CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC /* i945 G/P */ static const u32 data_clock_crossing[] = { 0xffffffff, 0xffffffff, /* nonexistant */ @@ -2822,9 +2822,9 @@ static void sdram_enable_memory_clocks(struct sys_info *sysinfo) { u8 clocks[2] = { 0, 0 };
-#if CONFIG_NORTHBRIDGE_INTEL_I945GM +#if CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM #define CLOCKS_WIDTH 2 -#elif CONFIG_NORTHBRIDGE_INTEL_I945GC +#elif CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC #define CLOCKS_WIDTH 3 #endif if (sysinfo->dimm[0] != SYSINFO_DIMM_NOT_POPULATED)