On Thu, Dec 4, 2008 at 8:21 AM, Rudolf Marek r.marek@assembler.cz wrote:
So would it be reasonable to have the domain reserve it, since having a resource for each CPU at the same place could get confusing? Do we have LAPIC devices on any platforms in Coreboot, so that it could be reserved there?
LAPIC is in any CPU post Pentium.
I was trying to say what Rudolf clarified. There is a local APIC in each CPU core at the addess 0xFEE00000 so we only need to reserve it once. Logically it doesn't make sense to have it in the northbridge. That gets back to just putting it in the domain. I thought that the IOAPIC 0xFEC00000 should in the southbridge but if the LAPIC is in the domain then maybe the IOAPIC shoud be with it.
I think that the only CPU coreboot supports that doesn't have a LAPIC is the Geode. It has no multicore capability and sitll uses the legacy PIC.
Marc