On Wed, Dec 17, 2008 at 6:33 PM, Corey Osgood corey.osgood@gmail.comwrote:
On Wed, Dec 17, 2008 at 5:29 PM, Myles Watson mylesgw@gmail.com wrote:
On Wed, Dec 17, 2008 at 2:19 PM, Corey Osgood corey.osgood@gmail.comwrote:
On Wed, Dec 17, 2008 at 3:24 PM, Corey Osgood corey.osgood@gmail.comwrote:
On Wed, Dec 17, 2008 at 2:03 PM, Myles Watson mylesgw@gmail.comwrote:
Ok, adding it there work. But why does it work there but nowhere else?
I think it has to do with build order and stage0 vs. stage 2.
self-acked and committed, feel free to move c7.c anywhere you think it
belongs ;) I've self-acked for expediency, I'm about to brave a snowstorm to get to school for a final, and won't be back for probably 4 hours or so. I also updated the epia-cn dts, so it should be in the same state as the j7f2 if you fix the superio stuff.
Here's a patch for the dts. (Corey - sorry I forgot to send it to the list.)
It needs the dtc-links.diff patch from this mail. Or you can just leave the SuperIO as a child of the domain.
http://www.coreboot.org/pipermail/coreboot/2008-December/043327.html
One comment:
Index: coreboot-v3/mainboard/jetway/j7f2/dts
--- coreboot-v3.orig/mainboard/jetway/j7f2/dts +++ coreboot-v3/mainboard/jetway/j7f2/dts @@ -66,23 +66,46 @@ /* How do I represent the bus and pci devices hanging here? */ pci@1,0 { /config/("northbridge/via/cn700/pci.dts");
pci@0,1 {
pci@0,0 { /config/("northbridge/via/cn700/vga.dts"); }; };
pci@f,0 {};pci@10,0 {
pci@8,0 { /* RaLink RT2561/RT61 802.11g PCI */};pci@a,0 { /* IEEE 1394 Host Controller */};These two devices shouldn't be in the dts. The RaLink card is a PCI card I neglected to remove before sending that lspci, and the firewire controller is only on some j7f2-series boards
No problem. I was just going from the lspci in the file.
Other then that, I'll try out the rest of the changes tonight.
Great. Good luck.
Myles