[coreboot] Coffeelake Reset S5 Problem

[cagatay bagci]

Hello all,We have a custom CFL board that resembles CFL RVP-11. I compiled the code and flashed it and it started booting without problem. However after global reset, it stucks at S5 and S5 signal asserts low. Because of that, microcontroller does not power up the system. What might be the problem?
Log is ending here:

[INFO ]  Done allocating resources.[0m[DEBUG]  BS: BS_DEV_RESOURCES run times (exec / console): 3 / 75 ms[0m[DEBUG]  GLOBAL RESET![0m[INFO ]  global_reset() called![0m[DEBUG]  HECI: Global Reset(Type:1) Command
Thanks,