[coreboot] r3322 - in trunk/coreboot-v2/src: mainboard/rca/rm4100 northbridge/intel/i82830

Author: linux_junkie
Date: 2008-05-15 15:44:33 +0200 (Thu, 15 May 2008)
New Revision: 3322

Added:
   trunk/coreboot-v2/src/northbridge/intel/i82830/memory_initialized.c
Modified:
   trunk/coreboot-v2/src/mainboard/rca/rm4100/auto.c
Log:
This patch allows the RCA RM4100 to reboot. Upon rebooting in auto.c it detects if the memory is already initialized, if so it issues a hard reset through the southbridge.

Signed-off-by: Joseph Smith 
Acked-by: Stefan Reinauer

Modified: trunk/coreboot-v2/src/mainboard/rca/rm4100/auto.c
===================================================================
--- trunk/coreboot-v2/src/mainboard/rca/rm4100/auto.c	2008-05-15 03:24:43 UTC (rev 3321)
+++ trunk/coreboot-v2/src/mainboard/rca/rm4100/auto.c	2008-05-15 13:44:33 UTC (rev 3322)
@@ -33,7 +33,9 @@
 #include "ram/ramtest.c"
 #include "superio/smsc/smscsuperio/smscsuperio_early_serial.c"
 #include "northbridge/intel/i82830/raminit.h"
+#include "northbridge/intel/i82830/memory_initialized.c"
 #include "southbridge/intel/i82801xx/i82801xx.h"
+#include "southbridge/intel/i82801xx/i82801xx_reset.c"
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "cpu/x86/bist.h"
 #include "spd_table.h"
@@ -95,6 +97,9 @@

if (bist == 0)
    	early_mtrr_init();
+		if (memory_initialized()) {
+			hard_reset();
+		}

enable_smbus();

@@ -103,6 +108,9 @@
    uart_init();
    console_init();

+	/* Prevent the TCO timer from rebooting us */
+	i82801xx_halt_tco_timer();
+
    /* Halt if there was a built in self test failure. */
    report_bist_failure(bist);

@@ -114,6 +122,5 @@
    /* ram_check(0, 640 * 1024); */
    /* ram_check(130048 * 1024, 131072 * 1024); */

-	i82801xx_halt_tco_timer();
    ac97_io_enable();
 }

Added: trunk/coreboot-v2/src/northbridge/intel/i82830/memory_initialized.c
===================================================================
--- trunk/coreboot-v2/src/northbridge/intel/i82830/memory_initialized.c	                        (rev 0)
+++ trunk/coreboot-v2/src/northbridge/intel/i82830/memory_initialized.c	2008-05-15 13:44:33 UTC (rev 3322)
@@ -0,0 +1,30 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2008 Joseph Smith 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+
+#include "i82830.h"
+#define NB_DEV PCI_DEV(0, 0, 0)
+
+static inline int memory_initialized(void)
+{
+	u32 drc;
+	drc = pci_read_config32(NB_DEV, DRC);
+	return (drc & (1<<29));
+}